AD9261 16位、10 MHz带宽、30 MSPS至160 MSPS、连续时间Σ-Δ型ADC

AD9261:16位、10 MHz带宽、30 MSPS至160 MSPS、连续时间Σ-Δ型ADC

AD9261是一款16位模数转换器(ADC)，采用连续时间Σ-Δ架构，可在10 MHz输入带宽上实现86 dB的动态范围。连续时间Σ-Δ架构所独有的集成功能和特性可大大简化其使用，并将所需的外部原件降至最少。AD9261具有阻性输入阻抗，可显著降低对驱动器放大器的要求。此外，32倍过采样五阶连续时间环路滤波器可显著衰减带外信号和混叠，因而输入端无需外部滤波器。

外部时钟输入或集成的整数N分频锁相环(PLL)提供过采样连续时间Σ-Δ调制器所需的640 MHz内部时钟。片内抽取滤波器和采样速率转换器可将调制器数据速率从640 MSPS降至用户定义的输出数据速率（30 MSPS至160 MSPS），从而实现更高效、更直接的接口。数字输出数据格式为偏移二进制、格雷码或二进制补码。数据时钟输出(DCO)用来确保接收逻辑以正确的时序工作。

The AD9261 is a 16-bit analog-to-digital converter (ADC) based on a continuous time sigma-delta (Σ-Δ) architecture that achieves 86 dB of dynamic range over a 10 MHz input bandwidth. The integrated features and characteristics unique to the continuous time Σ-Δ architecture significantly simplify its use and minimize the need for external components.

The AD9261 has a resistive input impedance that significantly relaxes the requirements of the driver amplifier. In addition, a 32× oversampled 5th-order continuous time loop filter significantly attenuates out of band signals and aliases, reducing the need for external filters at the input.

An external clock input or the integrated integer-N PLL provides the 640 MHz internal clock needed for the oversampled continuous time Σ-Δ modulator. On-chip decimation filters and sample rate converters reduce the modulator data rate from 640 MSPS to a user-defined output data rate between 30 MSPS to 160 MSPS, enabling a more efficient and direct interface.

The digital output data is presented in offset binary, Gray code, or twos complement format. A data clock output (DCO) is provided to ensure proper timing with the receiving logic.The AD9261 operates on a 1.8 V analog supply and a 1.8 V to 3.3 V digital supply, consuming 375 mW. The AD9261 is available in a 48-lead LFCSP and is specified over the industrial temperature range (−40°C to +85°C).

AD9261 特点

SNR: 82.5 dB (84.5 dBFS)to 10 MHz input
SFDR: 87 dBc to 10 MHz input
Selectable bandwidth: 2.5 MHz/5 MHz/10 MHz
Output data rate: 30 MSPS to 160 MSPS
Input impedance: 1 kΩ
Integrated decimation filter, sample rate converter, and PLL clock multiplier
1.8V analog and 1.8V to 3.3V digital output supply
Dual channel modulator only version available

AD9261 技术指标

Resolution (Bits): 16bit
# Chan: 1
Sample Rate: 160MSPS
Interface: Par
Analog Input Type: Diff-Uni
Ain Range: 2 V p-p
ADC Architecture: Sigma-Delta
Pkg Type: CSP

AD9261 亮点

连续时间Σ-Δ架构可有效实现高动态范围和宽带宽。
无源输入结构可降低对驱动器放大器的要求，或者省去驱动器放大器。
32倍过采样率和高阶环路滤波器可提供出色的混叠抑制性能，降低对抗混叠滤波器的要求，或者省去抗混叠滤波器。
集成的抽取滤波器、采样速率转换器、PLL时钟乘法器和基准电压源使该器件易于使用。
采用1.8 V单模拟电源和1.8 V至3.3 V输出电源供电。
标准串行端口接口(SPI)支持各种产品特性和功能。
Continuous time Σ-Δ architecture efficiently achieves high dynamic range and wide bandwidth.
Passive input structure reduces or eliminates the requirements for a driver amplifier.
An oversampling ratio of 32× and high order loop filter provide excellent alias rejection reducing or eliminating the need for antialiasing filters.
An integrated decimation filter, sample rate converter, PLL clock multiplier, and voltage reference provide ease of use.
Operates from a single 1.8 V analog power supply and 1.8 V to 3.3 V output supply.
A standard serial port interface (SPI) supports various product features and functions.

AD9261 建议配套产品

推荐AD9261使用的ADC驱动器
针对要求低噪声和高线性度的差分输入，建议使用ADA4937-1或ADA4932-1。
推荐AD9261使用的时钟驱动器如需低抖动性能，推荐使用AD9510 、 AD9511 、 AD9512 、 AD9513 、 AD9514 、 AD9515 、 AD9516-0或AD9517-0系列多路输出时钟。
推荐AD9261使用的外部基准电压源欲降低温漂并提高增益精度，推荐使用ADR130（1V基准电压源）。
推荐电源解决方案欲选择电压调节器产品，请使用ADIsimPower。
欲选择电源监控器产品，请使用电源监控器参数搜索。

AD9261 应用领域

数据采集
自动测试设备
仪器仪表
医疗成像
Data Acquisition
Automated Test Equipment
Instrumentation
Medical Imaging

AD9261 功能框图

AD9261 芯片订购指南

产品型号	封装	引脚	温度范围	包装和数量	报价*(100-499)	报价*1000 pcs	RoHS
AD9261-10EBZ 产品状态: 量产	评估板	48	工业	1	$ 300.00	$ 300.00	是
AD9261BCPZ-10 产品状态: 量产	48 ld LFCSP (7x7x.85mm w/5.1mm Pad)	48	工业	Tray, 260	$ 32.94	$ 28.00	是
AD9261BCPZRL7-10 产品状态: 量产	48 ld LFCSP (7x7x.85mm w/5.1mm Pad)	48	工业	Reel, 750	$ 32.94	$ 28.00	是