SN65LVDS049 双路高速差动驱动器和接收器

The SN65LVDS049 is a dual flow-through differential line driver-receiver pair that uses low-voltage differential signaling (LVDS) to achieve signaling rates as high as 400 Mbps. The TIA/EIA-644-A standard compliant electrical interface provides a minimum differential output voltage magnitude of 250 mV into a 100- load and receipt of signals with up to 1 V of ground potential difference between a transmitter and receiver. The LVDS receivers have internal failsafe biasing that places the outputs into a known high state for unconnected differential inputs.

The intended application of this device and signaling technique is for point-to-point baseband data transmission over controlled impedance media of approximately 100- characteristic impedance

	SN65LVDM050	SN65LVDM051	SN65LVDS049	SN65LVDS050	SN65LVDS051	SN65LVDS1050	SN65LVDS32B	SN65LVDS33	SN65LVDT32B	SN65LVDT33
Input Signal	LVDM, LVTTL	LVDM, LVTTL	LVDS, LVTTL	LVDS, LVTTL	LVDS, LVTTL	LVDS, LVTTL	LVDS	CMOS, ECL, LVCMOS, LVDS, LVECL, LVPECL, PECL	LVDS	LVDS, LVECL, LVPECL, PECL
Output Signal	LVDM, LVTTL	LVDM, LVTTL	LVDS, LVTTL	LVDS, LVTTL	LVDS, LVTTL	LVDS, LVTTL	LVTTL	LVTTL	LVTTL	LVTTL
No. of Rx	2	2	2	2	2	2	4	4	4	4
No. of Tx	2	2	2	2	2	2
Signaling Rate(Mbps)	500TX/100RX	500TX/100RX	400	400TX/100RX	400TX/100RX	400	400	400	400	400
Supply Voltage(s)(V)	3.3	3.3	3.3	3.3	3.3	3.3	3.3	3.3	3.3	3.3
ICC(Max)(mA)	27	27	35	20	20	20	23	23	23	23
Rx tpd(Typ)(ns)	3.7	3.7	1.9	3.7	3.7	3.7	4	4	4	4
Tx tpd(Typ)(ns)	1.7	1.7	1.3	1.7	1.7	1.7
Part-to-Part Skew(Max)(ps)	1000	1000	1000				1000	1000	1000	1000
Pin/Package	16SOIC, 16TSSOP	16SOIC, 16TSSOP	16TSSOP	16SOIC, 16TSSOP	16SOIC, 16TSSOP	16TSSOP	16SOIC	16SOIC, 16TSSOP	16SOIC	16SOIC, 16TSSOP
Operating Temperature Range(°C)	-40 to 85	-40 to 85	-40 to 85	-40 to 85	-40 to 85	-40 to 85	-40 to 85	-40 to 85	-40 to 85	-40 to 85
ESD HBM(kV)	12	12	10	12	12	12	15	15	15	15
Approx. Price (US$)	1.50 | 1ku	1.50 | 1ku	0.95 | 1ku	1.50 | 1ku	1.50 | 1ku	1.65 | 1ku	2.70 | 1ku	1.20 | 1ku	3.40 | 1ku	1.50 | 1ku

SN65LVDS049 特性

• DS90LV049 Compatible
• Up to 400 Mbps Signaling Rates
• Flow-Through Pin-out
• 50 ps Driver Channel-to-Channel Skew (Typ)
• 50 ps Receiver Channel-to-Channel Skew (Typ)
• 3.3-V Power Supply
• High-Impedance Disable for all Outputs
• Internal Failsafe Biasing of Receiver Inputs
• 1.4 ns Driver Propagation Delay (Typ)
• 1.9 ns Receiver Propagation Delay (Typ)
• High Impedance Bus Pins on Power Down
• ANSI TIA/EIA-644-A Compliant
• Receiver Input and Driver Output ESD Exceeds 10 kV
• 16-pin TSSOP Package
• APPLICATIONS
  • Full-duplex LVDS Communications of Clock and Data
  • Printers

SN65LVDS049 芯片订购指南

器件	状态	温度	价格	封装 | 引脚	封装数量 | 封装载体	丝印标记
SN65LVDS049PW	ACTIVE	-40 to 85	1.10 | 1ku	TSSOP (PW) | 16	90 | TUBE
SN65LVDS049PWG4	ACTIVE	-40 to 85	1.10 | 1ku	TSSOP (PW) | 16	90 | TUBE
SN65LVDS049PWR	ACTIVE	-40 to 85	0.95 | 1ku	TSSOP (PW) | 16	2000 | LARGE T&R
SN65LVDS049PWRG4	ACTIVE	-40 to 85	0.95 | 1ku	TSSOP (PW) | 16	2000 | LARGE T&R

SN65LVDS049 质量与无铅数据

器件	环保计划*	铅/焊球涂层	MSL 等级/回流焊峰	环保信息与无铅 (Pb-free)	DPPM / MTBF / FIT 率
SN65LVDS049PW	Green (RoHS & no Sb/Br)	CU NIPDAU	Level-1-260C-UNLIM	SN65LVDS049PW	SN65LVDS049PW
SN65LVDS049PWG4	Green (RoHS & no Sb/Br)	CU NIPDAU	Level-1-260C-UNLIM	SN65LVDS049PWG4	SN65LVDS049PWG4
SN65LVDS049PWR	Green (RoHS & no Sb/Br)	CU NIPDAU	Level-1-260C-UNLIM	SN65LVDS049PWR	SN65LVDS049PWR
SN65LVDS049PWRG4	Green (RoHS & no Sb/Br)	CU NIPDAU	Level-1-260C-UNLIM	SN65LVDS049PWRG4	SN65LVDS049PWRG4

SN65LVDS049 应用技术支持与电子电路设计开发资源下载

1. SN65LVDS049 数据资料 dataSheet 下载.PDF
2. TI 德州仪器LVDS PHYs选型与价格 . xls
3. 所选封装材料的热学和电学性质 (PDF 645 KB)
4. 使用数字隔离器设计隔离式 I2C 总线接口 (zhct119.PDF, 339 KB)
5. 1Q 2011 Issue Analog Applications Journal (slyt399.PDF, 964 KB)
6. 接口选择指南 (Rev. D) (PDF 2994 KB)
7. Signaling Rate vs. Distance for Differential Buffers (PDF 420 KB)
8. Q1 2009 Issue Analog Applications Journal (slyt319.PDF, 1.39 MB)
9. Isolated RS-485 Reference Design (PDF 80 KB)
10. 无铅组件涂层的保存期评估 (PDF 1305 KB)
11. Analog Signal Chain Guide (8.62 MB)
12. Industrial Interface IC Solutions (101 KB)