SN65CML100 1.5Gbps LVDS/LVPECL/CML 至 CML 转换器/中继器
This high-speed translator/repeater is designed for signaling rates up to 1.5 Gbps to support various high-speed network routing applications. The driver output is compatible with current-mode logic (CML) levels, and directly drives 50-
loads connected to 1.8-V, 2.5-V, or 3.3-V nominal supplies. The capability for direct connection to the loads may eliminate the need for coupling capacitors. The receiver input is compatible with LVDS (TIA/EIA–644), LVPECL, and CML signaling levels. The receiver tolerates a wide common-mode voltage range, and may also be directly coupled to the signal source. The internal data path from input to output is fully differential for low noise generation and low pulse-width distortion.
|
SN65CML100 |
SN65LVDS100 |
SN65LVDS101 |
SN65LVDS16 |
SN65LVDS17 |
SN65LVDS18 |
SN65LVDS19 |
SN65LVDS20 |
SN65LVP16 |
SN65LVP17 |
SN65LVP18 |
SN65LVP19 |
SN65LVP20 |
| Supply Voltage(s)(V) |
3.3 |
3.3 |
3.3 |
2.5 , 3.3 |
2.5 , 3.3 |
2.5 , 3.3 |
2.5 , 3.3 |
2.5 , 3.3 |
2.5 , 3.3 |
2.5 , 3.3 |
2.5 , 3.3 |
2.5 , 3.3 |
2.5 , 3.3 |
| ICC(Max)(mA) |
12 |
30 |
90 |
48 |
48 |
36 |
36 |
45 |
48 |
48 |
36 |
36 |
45 |
| Signaling Rate(Mbps) |
1500 |
2000 |
2000 |
4000 |
4000 |
2000 |
2000 |
4000 |
4000 |
4000 |
4000 |
2000 |
4000 |
| No. of Tx |
1 |
1 |
1 |
1 |
1 |
1 |
1 |
1 |
1 |
1 |
1 |
1 |
1 |
| Operating Temperature Range(C) |
-40 to 85 |
-40 to 85 |
-40 to 85 |
-40 to 85 |
-40 to 85 |
-40 to 85 |
-40 to 85 |
-40 to 85 |
-40 to 85 |
-40 to 85 |
-40 to 85 |
-40 to 85 |
-40 to 85 |
| Tx tpd(Typ)(ns) |
|
|
|
0.460 |
0.460 |
0.460 |
0.460 |
0.450 |
0.460 |
0.460 |
0.460 |
0.460 |
0.450 |
| No. of Rx |
1 |
1 |
1 |
1 |
1 |
1 |
1 |
1 |
1 |
1 |
1 |
1 |
1 |
| Input Signal |
CML, LVDS, LVPECL |
CML, LVDS, LVPECL |
CML, LVDS, LVPECL |
Single-Ended |
Differential |
Single-Ended |
Differential |
Differential |
Single-Ended |
Differential |
Single-Ended |
Differential |
Differential |
| Rx tpd(Typ)(ns) |
0.8 |
0.8 |
0.9 |
|
|
|
|
0.630 |
|
|
|
|
0.630 |
| Output Signal |
CML |
LVDS |
LVPECL |
LVDS |
LVDS |
LVDS |
LVDS |
LVDS |
LVPECL |
LVPECL |
LVPECL |
LVPECL |
LVPECL |
| Peak-to-Peak Jitter(Max)(ps) |
70 |
65 |
61 |
|
|
|
|
35 |
|
|
|
|
35 |
| Part-to-Part Skew(Max)(ps) |
100 |
100 |
100 |
80 |
80 |
80 |
80 |
80 |
80 |
80 |
80 |
80 |
80 |
| ESD HBM(kV) |
5 |
5 |
5 |
3 |
3 |
3 |
3 |
3 |
3 |
3 |
3 |
3 |
3 |
| Pin/Package |
8MSOP, 8SOIC |
8MSOP, 8SOIC |
8MSOP, 8SOIC |
8WSON |
8WSON |
8WSON |
8WSON |
8WSON |
8WSON |
8WSON |
8WSON |
8WSON |
8WSON |
SN65CML100 特性
- Provides Level Translation From LVDS or LVPECL to CML, Repeating From CML to CML
- Signaling Rates1 up to 1.5 Gbps
- CML Compatible Output Directly Drives Devices With 3.3-V, 2.5-V, or 1.8-V Supplies
- Total Jitter < 70 ps
- Low 100 ps (Max) Part-To-Part Skew
- Wide Common-Mode Receiver Capability Allows Direct Coupling of Input Signals
- 25 mV of Receiver Input Threshold Hysteresis Over 0-V to 4-V Common-Mode Range
- Propagation Delay Times, 800 ps Maximum
- 3.3-V Supply Operation
- Available in SOIC and MSOP Packages
- APPLICATIONS
- Level Translation
- 622-MHz Central Office Clock Distribution
- High-Speed Network Routing
- Wireless Basestations
- Low Jitter Clock Repeater
SN65CML100 芯片订购指南
| 器件 |
状态 |
温度 |
价格 |
封装 | 引脚 |
封装数量 | 封装载体 |
丝印标记 |
| SN65CML100D |
ACTIVE |
-40 to 85 |
1.80 | 1ku |
SOIC (D) | 8 |
75 | TUBE |
|
| SN65CML100DG4 |
ACTIVE |
-40 to 85 |
1.80 | 1ku |
SOIC (D) | 8 |
75 | TUBE |
|
| SN65CML100DR |
ACTIVE |
-40 to 85 |
1.50 | 1ku |
SOIC (D) | 8 |
2500 | LARGE T&R |
|
| SN65CML100DRG4 |
ACTIVE |
-40 to 85 |
1.50 | 1ku |
SOIC (D) | 8 |
2500 | LARGE T&R |
|
SN65CML100 质量与无铅数据
| 器件 |
环保计划* |
铅/焊球涂层 |
MSL 等级/回流焊峰 |
环保信息与无铅 (Pb-free) |
DPPM / MTBF / FIT 率 |
| SN65CML100D |
Pb-Free (RoHS) |
CU NIPDAU |
Level-1-260C-UNLIM |
SN65CML100D |
SN65CML100D |
| SN65CML100DG4 |
Pb-Free (RoHS) |
CU NIPDAU |
Level-1-260C-UNLIM |
SN65CML100DG4 |
SN65CML100DG4 |
| SN65CML100DR |
Pb-Free (RoHS) |
CU NIPDAU |
Level-1-260C-UNLIM |
SN65CML100DR |
SN65CML100DR |
| SN65CML100DRG4 |
Pb-Free (RoHS) |
CU NIPDAU |
Level-1-260C-UNLIM |
SN65CML100DRG4 |
SN65CML100DRG4 |
SN65CML100 应用技术支持与电子电路设计开发资源下载
- SN65CML100 数据资料 dataSheet 下载.PDF
- TI 德州仪器转发器/转换器选型与价格 . xls
- 所选封装材料的热学和电学性质 (PDF 645 KB)
- 使用数字隔离器设计隔离式 I2C 总线接口 (zhct119.PDF, 339 KB)
- 1Q 2011 Issue Analog Applications Journal (slyt399.PDF, 964 KB)
- 接口选择指南 (Rev. D) (PDF 2994 KB)
- Signaling Rate vs. Distance for Differential Buffers (PDF 420 KB)
- Q1 2009 Issue Analog Applications Journal (slyt319.PDF, 1.39 MB)
- Isolated RS-485 Reference Design (PDF 80 KB)
- 无铅组件涂层的保存期评估 (PDF 1305 KB)
- Analog Signal Chain Guide (8.62 MB)
- Industrial Interface IC Solutions (101 KB)
SN65CML100 工具和软件