SN75LVDS390 双路 LVDS 接收器
SN65LVDS390 SN65LVDT390 SN75LVDS390 SN75LVDT390
Input Signal
LVDS
LVDS
LVDS
LVDS
Output Signal
LVTTL
LVTTL
LVTTL
LVTTL
No. of Rx
4
4
4
4
No. of Tx
630
630
630
630
Signaling Rate(Mbps)
3.3
3.3
3.3
3.3
Rx tpd(Typ)(ns)
18
18
18
18
Tx tpd(Typ)(ns)
2.6
2.6
2.6
2.6
Part-to-Part Skew(Max)(ps)
1000
1000
1000
1000
Pin/Package
16SOIC, 16TSSOP
16SOIC, 16TSSOP
16SOIC, 16TSSOP
16SOIC, 16TSSOP
Operating Temperature Range(°C)
-40 to 85
-40 to 85
0 to 70
0 to 70
ESD HBM(kV)
15
15
4
4
Approx. Price (US$)
1.20 | 1ku
1.40 | 1ku
1.20 | 1ku
1.40 | 1ku
SN75LVDS390 特性
Four- ('390), Eight- ('388A), or Sixteen- ('386) Line Receivers Meet or Exceed the Requirements of ANSI TIA/EIA-644 Standard
Integrated 110- Designed for Signaling Rates(1) Up To 200 Mbps
SN65 Version's Bus-Terminal ESD Exceeds 15 kV
Operates From a Single 3.3-V Supply
Typical Propagation Delay Time of 2.6 ns
Output Skew 100 ps (Typ) Part-To-Part Skew Is Less Than 1 ns
LVTTL Levels Are 5-V Tolerant
Open-Circuit FailSafe
Flow-Through Pinout
Packaged in Thin Shrink Small-Outline
Package With 20-mil Terminal Pitch
SN75LVDS390 芯片订购指南
器件
状态
温度
价格
封装 | 引脚
封装数量 | 封装载体
丝印标记
SN75LVDS390D
ACTIVE
-40 to 85
1.70 | 1ku
SOIC (D) | 16 40 | TUBE
SN75LVDS390DG4
ACTIVE
-40 to 85
1.70 | 1ku
SOIC (D) | 16 40 | TUBE
SN75LVDS390DR
ACTIVE
-40 to 85
1.40 | 1ku
SOIC (D) | 16 2500 | LARGE T&R
SN75LVDS390DRG4
ACTIVE
-40 to 85
1.40 | 1ku
SOIC (D) | 16 2500 | LARGE T&R
SN75LVDS390PW
ACTIVE
-40 to 85
1.70 | 1ku
TSSOP (PW) | 16 90 | TUBE
SN75LVDS390PWG4
ACTIVE
-40 to 85
1.70 | 1ku
TSSOP (PW) | 16 90 | TUBE
SN75LVDS390PWR
ACTIVE
-40 to 85
1.40 | 1ku
TSSOP (PW) | 16 2000 | LARGE T&R
SN75LVDS390PWRG4
ACTIVE
-40 to 85
1.40 | 1ku
TSSOP (PW) | 16 2000 | LARGE T&R
SN75LVDS390 质量与无铅数据
器件
环保计划*
铅/焊球涂层
MSL 等级/回流焊峰
环保信息与无铅 (Pb-free)
DPPM / MTBF / FIT 率
SN75LVDS390D
Green (RoHS & no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN75LVDS390D
SN75LVDS390D
SN75LVDS390DG4
Green (RoHS & no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN75LVDS390DG4 SN75LVDS390DG4
SN75LVDS390DR
Green (RoHS & no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN75LVDS390DR
SN75LVDS390DR
SN75LVDS390DRG4
Green (RoHS & no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN75LVDS390DRG4 SN75LVDS390DRG4
SN75LVDS390PW
Green (RoHS & no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN75LVDS390PW
SN75LVDS390PW
SN75LVDS390PWG4
Green (RoHS & no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN75LVDS390PWG4 SN75LVDS390PWG4
SN75LVDS390PWR
Green (RoHS & no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN75LVDS390PWR
SN75LVDS390PWR
SN75LVDS390PWRG4
Green (RoHS & no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN75LVDS390PWRG4 SN75LVDS390PWRG4
SN75LVDS390 应用技术支持与电子电路设计开发资源下载
SN75LVDS390 数据资料 dataSheet 下载 .PDF TI 德州仪器LVDS PHYs选型与价格 . xls 所选封装材料的热学和电学性质 (PDF 645 KB)使用数字隔离器设计隔离式 I2C 总线接口 (zhct119.PDF, 339 KB)1Q 2011 Issue Analog Applications Journal (slyt399.PDF, 964 KB)接口选择指南 (Rev. D) (PDF 2994 KB)Signaling Rate vs. Distance for Differential Buffers (PDF 420 KB)Q1 2009 Issue Analog Applications Journal (slyt319.PDF, 1.39 MB)Isolated RS-485 Reference Design (PDF 80 KB)无铅组件涂层的保存期评估 (PDF 1305 KB)Analog Signal Chain Guide (8.62 MB)Industrial Interface IC Solutions (101 KB)
This family of four-, eight-, or sixteen-, differential line receivers (with optional integrated termination) implements the electrical characteristics of low-voltage differential signaling (LVDS). This signaling technique lowers the output voltage levels of 5-V differential standard levels (such as EIA/TIA-422B) to reduce the power, increase the switching speeds, and allow operation with a 3-V supply rail. Any of the eight or sixteen differential receivers provides a valid logical output state with a ±100-mV differential input voltage within the input common-mode voltage range. The input common-mode voltage range allows 1 V of ground potential difference between two LVDS nodes. Additionally, the high-speed switching of LVDS signals almost always requires the use of a line impedance matching resistor at the receiving end of the cable or transmission media.
Line Termination Resistors on LVDT Products