ADS5545 具有 LVDS/CMOS 输出的14 位 170MSPS ADC
ADS5545 is a high performance 14-bit, 170-MSPS A/D converter. It offers state-of-the-art functionality and performance using advanced techniques to minimize board space. Using an internal sample and hold and low jitter clock buffer, the ADC supports both high SNR and high SFDR at high input frequencies. It features programmable gain options that can be used to improve SFDR performance at lower full-scale analog input ranges.
In a compact 48-pin QFN, the device offers fully differential LVDS DDR (Double Data Rate) interface while parallel CMOS outputs can also be selected. Flexible output clock position programmability is available to ease capture and trade-off setup for hold times. At lower sampling rates, the ADC can be operated at scaled down power with no loss in performance.
|
ADS5517 |
ADS5525 |
ADS5527 |
ADS5545 |
ADS5546 |
ADS5547 |
Resolution(Bits) |
11 |
12 |
12 |
14 |
14 |
14 |
Sample Rate (max) |
200MSPS |
170MSPS |
210MSPS |
170MSPS |
190MSPS |
210MSPS |
Architecture |
Pipeline |
Pipeline |
Pipeline |
Pipeline |
Pipeline |
Pipeline |
Power Consumption(Typ)(mW) |
1230 |
1100 |
1230 |
1100 |
1130 |
1230 |
SINAD(dB) |
66 |
69.8 |
70.2 |
73 |
72.8 |
72.6 |
SNR(dB) |
66 |
70.5 |
70.5 |
74 |
73.5 |
73.3 |
SFDR(dB) |
84 |
84 |
84 |
85 |
87 |
85 |
DNL(Max)(+/-LSB) |
0.5 |
0.5 |
0.5 |
0.5 |
0.5 |
0.5 |
INL(Max)(+/-LSB) |
2 |
1 |
1 |
3 |
3 |
3.5 |
No Missing Codes(Bits) |
11 |
12 |
12 |
14 |
14 |
14 |
ENOB(Bits) |
10.8 |
11.3 |
11.4 |
12 |
11.8 |
11.8 |
No. of Supplies |
2 |
2 |
2 |
2 |
2 |
2 |
Analog Voltage AV/DD(Min)(V) |
3.0 |
3.0 |
3.0 |
3.0 |
3.0 |
3.0 |
Analog Voltage AV/DD(Max)(V) |
3.6 |
3.6 |
3.6 |
3.6 |
3.6 |
3.6 |
Logic Voltage DV/DD(Min)(V) |
3.6 |
3.0 |
3.0 |
3.0 |
3.0 |
3.0 |
Logic Voltage DV/DD(Max)(V) |
3.6 |
3.6 |
3.6 |
3.6 |
3.6 |
3.6 |
Input Configuration Range |
2V (p-p) |
2V (p-p) |
2V (p-p) |
2V (p-p) |
2V (p-p) |
2.2V (p-p) |
Reference Mode |
Int and Ext |
Int and Ext |
Int and Ext |
Int and Ext |
Int and Ext |
Int and Ext |
Rating |
Catalog |
Catalog |
Catalog |
Catalog |
Catalog |
Catalog |
Pin/Package |
48VQFN |
48VQFN |
48VQFN |
48VQFN |
48VQFN |
48VQFN |
# Input Channels |
1 |
1 |
1 |
1 |
1 |
1 |
Operating Temp Range(Celsius) |
-40 to 85 |
-40 to 85 |
-40 to 85 |
-40 to 85 |
-40 to 85 |
-40 to 85 |
ADS5545 特性
- Maximum Sample Rate: 170 MSPS
- 14-Bit Resolution
- No Missing Codes
- Total Power Dissipation 1.1 W
- Internal Sample and Hold
- 74-dBFS SNR at 70-MHz IF
- 85-dBc SFDR at 70-MHz IF, 0 dB gain
- 11.4 ENOB Minimum at 70-MHz IF
- Double Data Rate (DDR) LVDS and Parallel CMOS Output Options
- Programmable Gain up to 6 dB for SNR/SFDR Trade-Off at High IF
- Reduced Power Modes at Lower Sample Rates
- Supports input clock amplitude down to 400 mVPP
- Clock Duty Cycle Stabilizer
- No External Reference Decoupling Required
- Internal and External Reference Support
- Programmable Output Clock position to ease data capture
- 3.3-V Analog and Digital Supply
- 48-QFN Package (7 mm × 7 mm)
- APPLICATIONS
- Wireless Communications Infrastructure
ADS5545 芯片订购指南
ADS5545 工具与软件
名称 |
型号 |
公司 |
工具/软件类型 |
关于高速高分辨率模数转换器的数字数据采集与分析 |
TSW1100 |
Texas Instruments |
仿真器/分析仪 |
ADS5517 评估模块 |
ADS5517EVM |
Texas Instruments |
开发电路板/EVM |
ADS5545 评估模块 |
ADS5545EVM |
Texas Instruments |
开发电路板/EVM |
ADS5546 评估模块 |
ADS5546EVM |
Texas Instruments |
开发电路板/EVM |
ADS5547 Evaluation Module |
ADS5547EVM |
Texas Instruments |
开发电路板/EVM |
用于模数转换器的抗混淆计算工具 |
ANTIALIASINGCALC |
Texas Instruments |
计算实用程序 |
运算放大器至 ADC 电路拓扑计算器 |
ADC-INPUT-CALC |
Texas Instruments |
计算实用程序 |
ADS5545 质量与无铅数据
ADS5545 应用技术支持与电子电路设计开发资源下载
- ADS5545 数据资料 dataSheet 下载.PDF
- TI 德州仪器仪ADC 模数转换器产品选型与价格 . xls
- 模数规格和性能特性术语表 (Rev. A) (PDF 1993 KB)
- 所选封装材料的热学和电学性质 (PDF 645 KB)
- 高速数据转换 (PDF 1967 KB)
- Shelf-Life Evaluation of Lead-Free Component Finishes (PDF
1305 KB)
- A
Spreadsheet for Calculating the Frequency Response of the ADS1250-54 (PDF
461 KB)
- A Spreadsheet for Calculating the Frequency Response of the
ADS1250-54
- Understanding the ADS1251, ADS1253, and ADS1254 Input
Circuitry (PDF 39 KB)
- Analog-to-Digital Converter Grounding Practices Affect System
Performance (PDF 56 KB)
- Principles of Data Acquisition and Conversion (PDF 50 KB)
- Interleaving Analog-to-Digital Converters (PDF 64 KB)
- What
Designers Should Know About Data Converter Drift (PDF 95 KB)
- Giving Delta-Sigma Converters a Gain Boost with a Front End
Analog Gain Stage (PDF 70 KB)
- Programming Tricks for Higher Conversion Speeds Utilizing Delta
Sigma Converters (PDF 105 KB)