汽车级 SPC560S60L5 32位MCU为群集应用步进电机,液晶图形控制器和LCD驱动器LQFP-144封装
The SPC560Sx family represents a new generation of 32-bit microcontrollers based on the Power ArchitectureTM. These devices are targeted to address the next wave of automotive instrument cluster applications driven by significant growth in demand for color Thin Film Transistor (TFT) displays within the vehicle. The advanced and cost-efficient processor core of the family complies with the Power Architecture? embedded category, which is 100% user-mode compatible with the original PowerPC user instruction set architecture (UISA). It offers high performance processing optimized for low power consumption, operating at speeds up to 64 MHz. The family itself is fully scalable from 256 KB up to 1 MB internal flash memory. The memory capacity can be further expanded via the on-chip QuadSPI serial flash controller module. Larger memory versions with greater graphics functionality are planned for the future.
The SPC560Sx family benefits from the extensive development infrastructure for Power Architecture devices which is already well established. This includes full support from available software drivers, operating systems and configuration code to assist with users' implementations. Refer to Section 5: Developer Support” for more information. The SPC560Sx family platform has a single level of memory hierarchy supporting on-chip SRAM and flash memories. The 1 MB flash version (SPC560S60) features 160 KB of onchip graphics SRAM to buffer cost effective color TFT displays driven via the on-chip Display Control Unit (DCU). Refer to Table 2 for specific memory and feature sets of the product family members.
The SPC560Sx family of microcontrollers are designed to reduce development and production costs of TFT-based instrument cluster displays by providing a single-chip solution with the processing and storage capacity to host and execute real-time application software and drive the TFT display directly. Operating at speeds of up to 64 MHz, these devices offer high performance processing with low power consumption. Memory and storage capacity can be further expanded via the on-chip Serial Peripheral Interface (SPI) and QuadSPI peripheral modules.
The SPC560Sx platform features up to 1 MB of on-chip flash memory, up to 160 KB of onchip graphics SRAM and an on-chip Display Control Unit (DCU) designed to drive color TFT displays.
SPC560Sx devices are compatible with the existing development infrastructure of current Power Architecture? devices and are supported with software drivers, operating systems and configuration code to assist with application development. Refer to Section 5: Developer Support” for more information.
| Package | Part number | |
| 512 Kbyte Flash | 1 Mbyte Flash | |
| LQFP144 | SPC560S50L5 | SPC560S60L5 |
| LQFP176 | ? | SPC560S60L7 |
| LFBGA208* | ? | SPC560S60L7 |
SPC560S60L5 订购型号:
| Ordering Model | Package | RoHS Compliance Grade | Marketing Status | Core | Internal RAM Size | Timed I/Os | Number of External Interrupts | Serial Interface | Supply Voltage(Vcc) | Supply Voltage(Vcc) | Mounting | Lifecycle: Date | Packing Type |
| nom | typ | min | max | ||||||||||
| B | V | V | |||||||||||
| SPC560S60L5B6G0R | LQFP 144 20x20x1.4 1.0 ExpadDown | Yes | Proposal | e200z0 | 48000 | 24 | 32 | 3xDSPI, 2xFlexCAN, 2xLINFlex (UART), 4xI2C | 3 | 5.5 | Surface.Mount | 08/28/2008 | - |
| SPC560S60L5B6G0Y | LQFP 144 20X20X1.4 2 | Ecopack1 | Preview | e200z0 | 48000 | 24 | 32 | 3xDSPI, 2xFlexCAN, 2xLINFlex (UART), 4xI2C | 3 | 5.5 | Surface.Mount | 2009-01-26T17:09:29 | Tray |
| SPC560S60L5BY | LQFP 144 20X20X1.4 2 | Ecopack2 | Preview | e200z0 | 48000 | 24 | 32 | 3xDSPI, 2xFlexCAN, 2xLINFlex (UART), 4xI2C | 3 | 5.5 | Surface.Mount | 2008-02-12T07:54:40 | Tray |
SPC560S60L5 特性:
- High performance 64 MHz e200z0h CPU
– 32-bit Power Architecture? book E CPU
– Up to 60 MIPs operation
– Variable length encoding (VLE) - Memory available
– Up to 1 Mbyte on-chip Flash, with ECC
– Up to 48 Kbytes on-chip RAM with ECC
– 160 Kbytes on-chip graphic RAM
– External flash entension via Quad-SPI
– 12-entry memory protection unit - Dashboard peripheral set
– 6 stepper motor drivers with stall detection and zero positioning
– 4 x 40 or 6 x 38 LCD display driver
– Sound control
– Real-time clock - TFT display control unit
– 4 x plane and cursor graphic controller
– Display capable of driving up to WVGA
– 24-bit RGB
– Proprietary display input - Interrupts and DMA
– Up to 128 selectable interrupts
– 16 priority levels
– Nonmaskable interrupt (NMI)
– Up to 32 external interrupts with 18 wakeup lines
– 16-channel eDMA controller - Up to 136 GPIOS in LQFP176
- Timer units
– 4-channel 32-bit periodic interrupt timers
– 4-channel 32-bit system timer module
– Software watchdog timer - Timed I/O
– 8-channel 16-bit counter IC/OC
– 16-channel 16-bit counter IC/OC/PWM - Communications interface
– 2 FlexCAN interfaces (2.0B active)
– Up to 3 LINFlex/UART channels
– Up to 3 DSPI channels, with one Quad-SPI
– Up to 4 I2C interfaces - 16/23-channel,10-bit ADC converter
- On-chip CAN/UART bootstrap loader
- Clock generation
– 4 to 16 MHz main oscillator
– 32 kHz auxiliary oscillator
– 16 MHz internal RC oscillator
– 128 kHz internal RC oscillator for low power modes
– Up to 2 software-controlled internal FMPLL modulated or not - Exhaustive debugging capability
– Nexus L1 on all devices
– Nexus L2+ on LFBGA208 package - Voltage supply
– Single 5 V or 3.3 V supply for I/Os and ADC
– On-chip voltage regulator with external ballast transistor - 144 LQFP, 176 LQFP packages
- Operating temperature range -40 to 105 °C
SPC560S60L5 技术支持与电子电路设计开发资源下载
- ST意法SPC560P系列32位汽车微控制器SPC560S60L5 数据手册DataSheet 下载 . PDF(PDF 文件格式完整版)
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