The M95256, M95256-W and M95256-R are electrically erasable programmable memory (EEPROM) devices. They are accessed by a high speed SPI-compatible bus. Their memory array is organized as 32768 x 8 bits.
The device is accessed by a simple serial interface that is SPI-compatible. The bus signals are C, D and Q, as shown in Table 1 and Figure 1. The device is selected when Chip Select (S) is taken low. Communications with the device can be interrupted using Hold (HOLD).
Ordering Model | Storage Capacity | Serial Interface | Marketing Status | Automotive Grade | Supply Voltage(Vcc) | Supply Voltage(Vcc) | Clock Frequency(fSCL) | Package | ESample Flag |
spec | min | max | max | ||||||
kB | V | V | MHz | ||||||
M95256-WDW3TP/A | 256 | SPI | Active | Yes | 2.5 | 5.5 | 5 | TSSOP8 | No |
M95256-WDW6TP | 256 | SPI | Active | _ | 2.5 | 5.5 | 5 | TSSOP8 | Yes |
M95256-WMN3TP/A | 256 | SPI | Active | Yes | 2.5 | 5.5 | 5 | SO8 | No |
M95256-WMN6P | 256 | SPI | Active | _ | 2.5 | 5.5 | 5 | SO8 | No |
M95256-WMN6TP | 256 | SPI | Active | _ | 2.5 | 5.5 | 5 | SO8 | Yes |
M95256-WMW6G | 256 | SPI | Active | _ | 2.5 | 5.5 | 5 | SO 08 WIDE .208 (EIAJ) | No |
M95256-WMW6TG | 256 | SPI | Active | _ | 2.5 | 5.5 | 5 | SO 08 WIDE .208 (EIAJ) | No |