兼容标准MCS-51指令系统的AT89S8252单片机是一个低电压,高性能CMOS 8位单片机,片内含8k bytes的可反复擦写的只读程序存储器(PEROM)和256 bytes的随机存取数据存储器(RAM),SPI串行口用于编程向下装载,器件采用ATMEL公司的高密度、非易失性存储技术生产,片内置通用8位中央处理器和Flash存储单元,功能强大的AT89S8252单片机可为您提供许多高性低比的系统控制应用领域。
AT89S8252是一个低电压,高性能CMOS 8位单片机,片内含8k bytes的可反复擦写的Flash只读程序存储器和256 bytes的随机存取数据存储器(RAM),SPI串行口用于编程向下装载,器件采用ATMEL公司的高密度、非易失性存储技术生产,兼容标准MCS-51指令系统,片内置通用8位中央处理器和Flash存储单元,功能强大的AT89S8252单片机可为您提供许多较复杂系统控制应用场合。
AT89S8252有40个引脚,32个外部双向输入/输出(I/O)端口,9个中断源,内含2个外中断口,3个16位可编程定时计数器,可编程UART串行通信口,SPI串行口,AT89S8252可以按照常规方法进行编程,也可以在线编程。其将通用的微处理器和Flash存储器结合在一起,特别是可反复擦写的Flash存储器可有效地降低开发成本。 AT89S8252有PDIP、TQFP及PLCC等三种封装形式,以适应不同应用系统的需求。
The AT89S8252 is a low-power, high-performance CMOS 8-bit microcomputer with 8K bytes of downloadable Flash programmable and erasable read only memory and 2K bytes of EEPROM. The device is manufactured using Atmel's high-density nonvola t i l e memory technology and is compatible with the industry-standard 80C51 instruction set and pinout. The on-chip downloadable Flash allows the program memo r y to be reprogrammed in-system through an SPI serial interface or by a conventional nonvolatile memory programmer. By combining a versatile 8-bit CPU with downloadable Flash on a monolithic chip, the Atmel AT89S8252 is a powerful microcomputer which provides a highly-flexible and cost-effective solution to many embedded control applications.
The AT89S8252 provides the following standard features: 8K bytes of downloadable Flash, 2K bytes of EEPROM, 256 bytes of RAM, 32 I/O lines, programmable watchd o g timer, two data pointers, three 16-bit timer/counters, a six-vector two-level interrupt architecture, a full duplex serial port, on-chip oscillator, and clock circuitry. In addition, the AT89S8252 is designed with static logic for operation down to zero frequency and supports two software selectable power saving modes. The Idle Mode stops the CPU while allowing the RAM, timer/counters, serial port, and interrupt syste m to continue functioning.
The Power-down mode saves the RAM contents but freezes the oscillator, disabling all other chip functions until the next interrupt or hardware reset. The downloadable Flash can be changed a single byte at a time and is accessible through the SPI serial interface. Holding RESET active forces the SPI bus into a serial programming interface and allows the program memory to be written to or read from unless Lock Bit 2 has been activated.