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AD7466BRTZ-REEL: 1.6 V微功率12位ADC

AD7466/AD7467/AD7468*分别是12/10/8位高速、低功耗逐次逼近型模数转换器(ADC),工作电压为1.6V至3.6V单电源,具有低功耗特性,最高呑吐量可达200 kSPS。该器件内置一个低噪声、宽带宽采样保持放大器,可处理3 MHz以上的输入频率。

转换过程和数据采集过程通过CS和串行时钟进行控制,从而为器件与微处理器或DSP接口创造了条件。输入信号在CS的下降沿进行采样,而转换同时在此处启动。该器件不存在流水线延迟。

基准电压从VDD获得,从而为ADC提供了最宽的动态输入范围,因此,其模拟输入范围为0至VDD。转换速率取决于SCLK。

产品聚焦
  1. 额定电源电压:1.6 V至3.6 V
  2. 12、10和8位ADC,提供SOT-23和MSOP两种封装模式
  3. 高呑吐量、低功耗,正常工作模式下的最大功耗为0.9 mW(100 kSPS,3 V时)
  4. 灵活的功耗/串行时钟速度管理。转换速率取决于串行时钟,通过增加串行时钟速率可缩短转换时间。可在转换完成后自动进入省电模式,从而降低了省电模式下的平均功耗,器件的最大功耗为0.1 μA,省电模式下一般为8 nA
  5. 基准电压从电源获得
  6. 无流水线延迟
  7. 该器件具有一个标准逐次逼近型ADC,可通过CS输入对转换进行精确控制
产品应用领域 Applications

The AD7466/AD7467/AD7468* are 12-/10-/8-bit, high speed, low power, successive approximation analog-to-digital converters (ADCs), respectively. The parts operate from a single 1.6 V to 3.6 V power supply and feature throughput rates up to 200 kSPS with low power dissipation. The parts contain a low noise, wide bandwidth track-and-hold amplifier, which can handle input frequencies in excess of 3 MHz.

The conversion process and data acquisition are controlled using CS and the serial clock, allowing the devices to interface with microprocessors or DSPs. The input signal is sampled on the falling edge of CS, and the conversion is also initiated at this point. There are no pipeline delays associated with the part.

The reference for the part is taken internally from VDD. This allows the widest dynamic input range to the ADC. Thus, the analog input range for the part is 0 V to VDD. The conversion rate is determined by the SCLK.

产品焦点 Product Highlights
  1. Specified for supply voltages of 1.6 V to 3.6 V
  2. 12-, 10-, and 8-bit ADCs in SOT-23 and MSOP packages
  3. High throughput rate with low power consumption. Power consumption in normal mode of operation at 100 kSPS and 3 V is 0.9 mW maximum
  4. Flexible power/serial clock speed management. The conversion rate is determined by the serial clock, allowing the conversion time to be reduced through increases in the serial clock speed. Automatic power-down after conversion allows the average power consumption to be reduced when in power-down. Current consumption is 0.1 μA maximum and 8 nA typically when in power-down
  5. Reference derived from the power supply
  6. No pipeline delay
  7. The part features a standard successive approximation ADC with accurate control of conversions via a CS input
产品应用领域 Applications
AD7466BRTZ-REEL 特性
AD7466BRTZ-REEL 功能框图

AD7466 芯片订购指南
产品型号 产品状态 封装 引脚 温度范围
AD7466BRMZ 量产 8 ld MSOP 8 商业
AD7466BRMZ-REEL 量产 8 ld MSOP 8 商业
AD7466BRMZ-REEL7 量产 8 ld MSOP 8 商业
AD7466BRTZ-R2 量产 6 ld SOT-23 6 商业
AD7466BRTZ-REEL 量产 6 ld SOT-23 6 工业
AD7466BRTZ-REEL7 量产 6 ld SOT-23 6 商业
EVAL-AD7466CBZ 量产 评估板 - 待定
AD7466BRTZ-REEL 应用技术支持与电子电路设计开发资源下载
  1. AD7466 数据手册DataSheet 下载 . PDF
  2. ADI 模拟器件公司比较器产品选型指南 . PDF
  3. Analog Devices, Inc. 美国模拟器件公司产品订购手册 .PDF