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SN74LVC2G125 具有三态输出的双总线缓冲器闸

SN74LVC2G125 描述

The SN74LVC2G125 is a dual bus buffer gate, designed for 1.65-V to 5.5-V VCC operation. This device features dual line drivers with 3-state outputs. The outputs are disabled when the associated output-enable (OE) input is high.

NanoFreeTM package technology is a major breakthrough in IC packaging concepts, using the die as the package.

To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down

SN74LVC2G125
Pin/Package 8DSBGA
Operating Temperature Range(°C) -40 to 85
IOL(mA) 32
IOH(mA) -32
Input Level CMOS
Vcc max(V) 5.5
Technology Family LVC
Vcc min(V) 1.65
Approx. Price (US$) 0.18 | 1ku
Output Level CMOS
No. of Gates 2
tpd max(ns) 3.7
ICC(uA) 10
Rating Catalog
SN74LVC2G125 特性
SN74LVC2G125 芯片订购指南
器件 状态 温度 价格(美元) 封装 | 引脚 封装数量 | 封装载体 丝印标记
SN74LVC2G125YZPR ACTIVE -40 to 85 0.22 | 1ku DSBGA (YZD) | 8 3000 | LARGE T&R  
SN74LVC2G125 质量与无铅数据
器件 环保计划* 铅/焊球涂层 MSL 等级/回流焊峰 环保信息与无铅 (Pb-free) DPPM / MTBF / FIT 率
SN74LVC2G125YZPR Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LVC2G125YZPR SN74LVC2G125YZPR
SN74LVC2G125 应用技术支持与电子电路设计开发资源下载
  1. SN74LVC2G125 数据资料 dataSheet 下载.PDF
  2. TI 德州仪器缓冲器、驱动器/收发器产品选型与价格 . xls
  3. CMOS 非缓冲反向器在振荡器电路中的使用 (PDF 951 KB)
  4. Semiconductor Packing Methodology (PDF 3005 KB)
  5. 逻辑产品选择指南 2006/2007 (修订版 Z)(4462KB)
  6. 标准线性和逻辑产品 5 分钟指南 (786KB)
  7. 了解和解释标准逻辑数据表
  8. LOGIC Pocket Data Book (PDF 6001 KB)
  9. HiRel Unitrode Power Management Brochure (PDF 206 KB)
  10. Logic Cross-Reference (PDF 2938 KB)