首页 > TI 德州仪器 > 逻辑 > 电压电平转换

SN74GTL2007 12 位 GTL-/GTL/GTL+ 至 LVTTL 转换器

The SN74GTL2007 is a 12-bit translator to interface between the 3.3-V LVTTL chip set I/O and the Xeon. processor GTL-/GTL/GTL+ I/O. The device is designed for platform health management in dual-processor applications.

SN74GTL2007
No. of Bits 12
No. of Outputs 12
Bus Drive(Max)(ma) -16/15
Static Current(Max)(mA) 12
tpd max(ns) 11
Voltage Nodes(Nom)(V) 3.3
Operating Temperature Range(°C) -40 to 85
Pin/Package 28TSSOP
Technology Family GTL
SN74GTL2007 特性
SN74GTL2007 芯片订购指南
器件 状态 温度 价格(美元) 封装 | 引脚 封装数量 | 封装载体 丝印标记
SN74GTL2007PW ACTIVE -40 to 85 2.00 | 1ku TSSOP (PW) | 28 50 | TUBE  
SN74GTL2007PWE4 ACTIVE -40 to 85 2.00 | 1ku TSSOP (PW) | 28 50 | TUBE  
SN74GTL2007PWG4 ACTIVE -40 to 85 2.00 | 1ku TSSOP (PW) | 28 50 | TUBE  
SN74GTL2007PWR ACTIVE -40 to 85 1.65 | 1ku TSSOP (PW) | 28 2000 | LARGE T&R  
SN74GTL2007PWRE4 ACTIVE -40 to 85 1.65 | 1ku TSSOP (PW) | 28 2000 | LARGE T&R  
SN74GTL2007PWRG4 ACTIVE -40 to 85 1.65 | 1ku TSSOP (PW) | 28 2000 | LARGE T&R  
SN74GTL2007 质量与无铅数据
器件 环保计划* 铅/焊球涂层 MSL 等级/回流焊峰 环保信息与无铅 (Pb-free) DPPM / MTBF / FIT 率
SN74GTL2007PW Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74GTL2007PW SN74GTL2007PW
SN74GTL2007PWE4 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74GTL2007PWE4 SN74GTL2007PWE4
SN74GTL2007PWG4 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74GTL2007PWG4 SN74GTL2007PWG4
SN74GTL2007PWR Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74GTL2007PWR SN74GTL2007PWR
SN74GTL2007PWRE4 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74GTL2007PWRE4 SN74GTL2007PWRE4
SN74GTL2007PWRG4 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74GTL2007PWRG4 SN74GTL2007PWRG4
SN74GTL2007 应用技术支持与电子电路设计开发资源下载
  1. SN74GTL2007 数据资料 dataSheet 下载.PDF
  2. TI 德州仪器电压电平转换产品选型与价格 . xls
  3. Shelf-Life Evaluation of Lead-Free Component Finishes (PDF 1305 KB)
  4. Understanding and Interpreting Standard-Logic Data Sheets (PDF 857 KB)
  5. TI IBIS File Creation, Validation, and Distribution Processes (PDF 380 KB)
  6. Implications of Slow or Floating CMOS Inputs (PDF 101 KB)
  7. CMOS Power Consumption and CPD Calculation (PDF 89 KB)
  8. Designing With Logic (PDF 186 KB)
  9. Live Insertion (PDF 150 KB)
  10. Input and Output Characteristics of Digital Integrated Circuits (PDF 1708 KB)
  11. Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc (PDF 43 KB)
  12. HiRel Unitrode Power Management Brochure (PDF 206 KB)
  13. LOGIC Pocket Data Book (PDF 6001 KB)
  14. HiRel Unitrode Power Management Brochure (PDF 206 KB)
  15. Logic Cross-Reference (PDF 2938 KB)