SN74CBT3384C 具有 -2V 下冲保护的 10 位 FET 总线开关

The SN74CBT3384C is a high-speed TTL-compatible FET bus switch with low ON-state resistance (ron), allowing for minimal propagation delay. Active Undershoot-Protection Circuitry on the A and B ports of the SN74CBT3384C provides protection for undershoot up to –2 V by sensing an undershoot event and ensuring that the switch remains in the proper OFF state.

The SN74CBT3384C is organized as two 5-bit bus switches with separate output-enable (1OE\, 2OE\) inputs. It can be used as two 5-bit bus switches or as one 10-bit bus switch. When OE\ is low, the associated 5-bit bus switch is ON, and the A port is connected to the B port, allowing bidirectional data flow between ports. When OE\ is high, the associated 5-bit bus switch is OFF, and the high-impedance state exists between the A and B ports

	SN74CBT3384C
Voltage Nodes(V)	5
Vcc range(V)	4.0 to 5.5
No. of Bits	10
Input Level	TTL
ron(max)(ohms)	12
Static Current	0.003
tpd max(ns)	0.15
Rating	Catalog
Technology Family	CBT-C

SN74CBT3384C 特性

Undershoot Protection for Off-Isolation on A and B Ports Up to –2 V
Bidirectional Data Flow, With Near-Zero Propagation Delay
Low ON-State Resistance (ron) Characteristics (ron = 3 Typical)
Low Input/Output Capacitance Minimizes Loading and Signal Distortion (Cio(OFF) = 5 pF Typical)
Data and Control Inputs Provide Undershoot Clamp Diodes
Low Power Consumption (ICC = 3 uA Max)
VCC Operating Range From 4 V to 5.5 V
Data I/Os Support 0 to 5-V Signaling Levels (0.8-V, 1.2-V, 1.5-V, 1.8-V, 2.5-V, 3.3-V, 5-V)
Control Inputs Can Be Driven by TTL or 5-V/3.3-V CMOS Outputs
Ioff Supports Partial-Power-Down Mode Operation
Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
ESD Performance Tested Per JESD 22
- 2000-V Human-Body Model (A114-B, Class II)
- 1000-V Charged-Device Model (C101)
Supports Both Digital and Analog Applications: PCI Interface, USB Interface, Memory Interleaving, Bus Isolation, Low-Distortion Signal Gating

SN74CBT3384C 芯片订购指南

器件	状态	温度	价格	封装 \| 引脚	封装数量 \| 封装载体	丝印标记
SN74CBT3384CDW	ACTIVE	-40 to 85	0.37 \| 1ku	SOIC(DW) \| 24	50 \| TUBE
SN74CBT3384CDWE4	ACTIVE	-40 to 85	0.37 \| 1ku	SOIC(DW) \| 24	50 \| TUBE
SN74CBT3384CDWG4	ACTIVE	-40 to 85	0.37 \| 1ku	SOIC(DW) \| 24	50 \| TUBE
SN74CBT3384CDWR	ACTIVE	-40 to 85	0.31 \| 1ku	SOIC(DW) \| 24	2500 \| LARGE T&R
SN74CBT3384CDWRE4	ACTIVE	-40 to 85	0.31 \| 1ku	SOIC(DW) \| 24	2500 \| LARGE T&R
SN74CBT3384CDWRG4	ACTIVE	-40 to 85	0.31 \| 1ku	SOIC(DW) \| 24	2500 \| LARGE T&R

SN74CBT3384C 质量与无铅数据

器件	环保计划*	铅/焊球涂层	MSL 等级/回流焊峰	环保信息与无铅 (Pb-free)	DPPM / MTBF / FIT 率
SN74CBT3384CDW	Green (RoHS & no Sb/Br)	CU NIPDAU	Level-1-260C-UNLIM	SN74CBT3384CDW	SN74CBT3384CDW
SN74CBT3384CDWE4	Green (RoHS & no Sb/Br)	CU NIPDAU	Level-1-260C-UNLIM	SN74CBT3384CDWE4	SN74CBT3384CDWE4
SN74CBT3384CDWG4	Green (RoHS & no Sb/Br)	CU NIPDAU	Level-1-260C-UNLIM	SN74CBT3384CDWG4	SN74CBT3384CDWG4
SN74CBT3384CDWR	Green (RoHS & no Sb/Br)	CU NIPDAU	Level-1-260C-UNLIM	SN74CBT3384CDWR	SN74CBT3384CDWR
SN74CBT3384CDWRE4	Green (RoHS & no Sb/Br)	CU NIPDAU	Level-1-260C-UNLIM	SN74CBT3384CDWRE4	SN74CBT3384CDWRE4
SN74CBT3384CDWRG4	Green (RoHS & no Sb/Br)	CU NIPDAU	Level-1-260C-UNLIM	SN74CBT3384CDWRG4	SN74CBT3384CDWRG4

SN74CBT3384C 应用技术支持与电子电路设计开发资源下载

SN74CBT3384C 数据资料 dataSheet 下载.PDF
TI 德州仪器信号开关产品选型与价格 . xls
Logic Guide 2009 (PDF 4263 KB)
防止模拟开关的额外功耗 (PDF 392 KB) (PDF 1305 KB)
Understanding and Interpreting Standard-Logic Data Sheets (PDF 857 KB)
TI IBIS File Creation, Validation, and Distribution Processes (PDF 380 KB)
Implications of Slow or Floating CMOS Inputs (PDF 101 KB)
CMOS Power Consumption and CPD Calculation (PDF 89 KB)
Designing With Logic (PDF 186 KB)
Live Insertion (PDF 150 KB)
Input and Output Characteristics of Digital Integrated Circuits (PDF 1708 KB)
Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc (PDF 43 KB)
HiRel Unitrode Power Management Brochure (PDF 206 KB)
LOGIC Pocket Data Book (PDF 6001 KB)
HiRel Unitrode Power Management Brochure (PDF 206 KB)
Logic Cross-Reference (PDF 2938 KB)