SN74ALS996 具有三态输出的 9 位 D 类透明读回锁存器
These 8-bit latches are designed specifically for storing the contents of the input data bus and providing the capability of reading back the stored data onto the input data bus. The Q outputs are designed with bus-driving capability.
The edge-triggered flip-flops enter the data on the low-to-high transition of the clock (CLK) input when the enable () input is low. Data can be read back onto the data inputs by taking the read (
) input low, in addition to having low. When EN\ is high, both the read-back and write modes are disabled. Transitions on should only be made with CLK high to prevent false clocking.
The polarity of the Q outputs can be controlled by the polarity (T/C\) input. When T/C\ is high, Q is the same as is stored in the flip-flops
| SN74ALS996 | |
| Voltage Nodes(V) | 5 |
| Technology Family | ABT |
| Rating | Catalog |
SN74ALS996 特性
- 3-State I/O-Type Read-Back Inputs
- Bus-Structured Pinout
- T/C\ Determines True or Complementary Data at Q Outputs
- Package Options Include Plastic Small-Outline (DW) Packages, Ceramic Chip Carriers (FK), and Standard Plastic (NT) and Ceramic (JT) 300-mil DIPs
SN74ALS996 芯片订购指南
| 器件 | 状态 | 温度 | 价格（美元） | 封装 | 引脚 | 封装数量 | 封装载体 | 丝印标记 |
| SN74ALS996DW | ACTIVE | 0 to 70 | 12.00 | 1ku | SOIC (DW) | 24 | 25 | TUBE | |
| SN74ALS996DWE4 | ACTIVE | 0 to 70 | 12.00 | 1ku | SOIC (DW) | 24 | 25 | TUBE | |
| SN74ALS996DWG4 | ACTIVE | 0 to 70 | 12.00 | 1ku | SOIC (DW) | 24 | 25 | TUBE | |
| SN74ALS996DWR | ACTIVE | 0 to 70 | 10.00 | 1ku | SOIC (DW) | 24 | 2000 | LARGE T&R | |
| SN74ALS996DWRE4 | ACTIVE | 0 to 70 | 10.00 | 1ku | SOIC (DW) | 24 | 2000 | LARGE T&R | |
| SN74ALS996DWRG4 | ACTIVE | 0 to 70 | 10.00 | 1ku | SOIC (DW) | 24 | 2000 | LARGE T&R | |
| SN74ALS996NT | ACTIVE | 0 to 70 | 11.35 | 1ku | PDIP (NT) | 24 | 15 | TUBE | |
| SN74ALS996NTE4 | ACTIVE | 0 to 70 | 11.35 | 1ku | PDIP (NT) | 24 | 15 | TUBE |
SN74ALS996 质量与无铅数据
| 器件 | 环保计划* | 铅/焊球涂层 | MSL 等级/回流焊峰 | 环保信息与无铅 (Pb-free) | DPPM / MTBF / FIT 率 |
| SN74ALS996DW | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | SN74ALS996DW | SN74ALS996DW |
| SN74ALS996DWE4 | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | SN74ALS996DWE4 | SN74ALS996DWE4 |
| SN74ALS996DWG4 | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | SN74ALS996DWG4 | SN74ALS996DWG4 |
| SN74ALS996DWR | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | SN74ALS996DWR | SN74ALS996DWR |
| SN74ALS996DWRE4 | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | SN74ALS996DWRE4 | SN74ALS996DWRE4 |
| SN74ALS996DWRG4 | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | SN74ALS996DWRG4 | SN74ALS996DWRG4 |
| SN74ALS996NT | Pb-Free (RoHS) | CU NIPDAU | Level-1-260C-UNLIM | SN74ALS996NT | SN74ALS996NT |
| SN74ALS996NTE4 | Pb-Free (RoHS) | CU NIPDAU | Level-1-260C-UNLIM | SN74ALS996NTE4 | SN74ALS996NTE4 |
SN74ALS996 应用技术支持与电子电路设计开发资源下载
- SN74ALS996 数据资料 dataSheet 下载.PDF
- TI 德州仪器触发器/锁存器/寄存器产品选型与价格 . xls
- Shelf-Life Evaluation of Lead-Free Component Finishes (PDF 1305 KB)
- Understanding and Interpreting Standard-Logic Data Sheets (PDF 857 KB)
- TI IBIS File Creation, Validation, and Distribution Processes (PDF 380 KB)
- Implications of Slow or Floating CMOS Inputs (PDF 101 KB)
- CMOS Power Consumption and CPD Calculation (PDF 89 KB)
- Designing With Logic (PDF 186 KB)
- Live Insertion (PDF 150 KB)
- Input and Output Characteristics of Digital Integrated Circuits (PDF 1708 KB)
- Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc (PDF 43 KB)
- HiRel Unitrode Power Management Brochure (PDF 206 KB)
- LOGIC Pocket Data Book (PDF 6001 KB)
- HiRel Unitrode Power Management Brochure (PDF 206 KB)
- Logic Cross-Reference (PDF 2938 KB)