SN74ABT125 描述The ’ABT125 quadruple bus buffer gates feature independent line drivers with 3-state outputs. Each output is disabled when the associated output-enable (OE)\ input is high.
These devices are fully specified for hot-insertion applications using Ioff and power-up 3-state. The Ioff circuitry disables the outputs, preventing damaging current backflow through the devices when they are powered down. The power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down, which prevents driver conflict.
To ensure the high-impedance state during power up or power down, OE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver
| SN54ABT125 | SN74ABT125 | |
| Voltage Nodes(V) | 5 | 5 | 
| Vcc range(V) | 4.5 to 5.5 | 4.5 to 5.5 | 
| Logic | True | True | 
| Input Level | TTL | TTL | 
| Output Level | TTL | TTL | 
| Output Drive(mA) | -32/64 | |
| No. of Gates | 4 | |
| No. of Outputs | 4 | 4 | 
| tpd max(ns) | 4.9 | |
| Static Current | 30 mA | |
| Rating | Military | Catalog | 
| Technology Family | ABT | ABT | 
| 器件 | 状态 | 温度 | 价格(美元) | 封装 | 引脚 | 封装数量 | 封装载体 | 丝印标记 | 
| SN74ABT125D | ACTIVE | 0 to 70 | 0.60 | 1ku | SOIC (D) | 14 | 50 | TUBE | ABT125 | 
| SN74ABT125DE4 | ACTIVE | 0 to 70 | 0.60 | 1ku | SOIC (D) | 14 | 50 | TUBE | ABT125 | 
| SN74ABT125DG4 | ACTIVE | 0 to 70 | 0.60 | 1ku | SOIC (D) | 14 | 50 | TUBE | ABT125 | 
| 器件 | 环保计划* | 铅/焊球涂层 | MSL 等级/回流焊峰 | 环保信息与无铅 (Pb-free) | DPPM / MTBF / FIT 率 | 
| SN74ABT125D | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | SN74ABT125D | SN74ABT125D | 
| SN74ABT125DE4 | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | SN74ABT125DE4 | SN74ABT125DE4 | 
| SN74ABT125DG4 | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | SN74ABT125DG4 | SN74ABT125DG4 |