SN54LVTH16501 具有三态输出的 3.3V ABT 18 位通用总线收发器
              The ’LVTH16501 devices are 18-bit universal bus transceivers designed for   low-voltage (3.3-V) VCC operation, but with the capability to provide   a TTL interface to a 5-V system environment.
              Data flow in each direction is controlled by output-enable (OEAB and OEBA), latch-enable (LEAB and LEBA),   and clock (CLKAB and CLKBA) inputs. For A-to-B data flow, the devices operate in   the transparent mode when LEAB is high. When LEAB is low, the A data is latched   if CLKAB is held at a high or low logic level. If LEAB is low, the A data is   stored in the latch/flip-flop on the low-to-high transition of CLKAB. When OEAB   is high, the outputs are active. When OEAB is low, the outputs are in the   high-impedance state.
              Data flow for B to A is similar to that of A to B but uses OEBA, LEBA, and CLKBA
              
                
                   | 
                  SN54LVTH16501 | 
                
                
                  | Voltage Nodes(V) | 
                  3.3, 2.7   | 
                
                
                  | Vcc range(V) | 
                  2.7 to 3.6   | 
                
                
                  | Output Drive(mA) | 
                  -24/+48   | 
                
                
                  | No. of Bits | 
                  18   | 
                
                
                  | Logic | 
                  True   | 
                
                
                  | Static Current | 
                  5 mA   | 
                
                
                  | tpd max(ns) | 
                  4.3   | 
                
                
                  | Rating | 
                  Military   | 
                
                
                  | Technology Family | 
                  LVT   | 
                
              
              SN54LVTH16501 特性
              
              
                - Members of the Texas Instruments 
                  WidebusTM Family   
                
 - UBTTM Transceiver Combines D-Type 
                  Latches and D-Type Flip-Flops for 
                  Operation in Transparent, Latched, or 
                  Clocked Mode   
                
 - State-of-the-Art Advanced BiCMOS 
                  Technology (ABT) Design for 3.3-V 
                  Operation and Low Static-Power 
                  Dissipation   
                
 - Support Mixed-Mode Signal Operation (5-V 
                  Input and Output Voltages With   3.3-V VCC)   
                
 - Support Unregulated Battery Operation 
                  Down to 2.7 V   
                
 - Typical VOLP (Output Ground Bounce)                  <0.8 V at   VCC = 3.3 V, TA = 25°C   
                
 - Ioff and Power-Up 3-State Support Hot 
                  Insertion   
                
 - Bus Hold on Data Inputs Eliminates the 
                  Need for External Pullup/Pulldown 
                  Resistors   
                
 - Distributed VCC and GND Pins Minimize 
                  High-Speed Switching   Noise   
                
 - Flow-Through Architecture Optimizes PCB Layout   
                
 - Latch-Up Performance Exceeds 500 mA Per JESD 17   
                
 - ESD Protection Exceeds JESD 22
                  
                      - 2000-V Human-Body Model (A114-A)   
                      
 - 200-V Machine Model (A115-A)
 
                  
                 
              
              SN54LVTH16501 芯片订购指南
              
                
                  | 器件 | 
                  状态 | 
                  温度 | 
                  价格(美元) | 
                  封装 | 引脚 | 
                  封装数量 | 封装载体 | 
                  丝印标记 | 
                
                
                  | 5962-9677701QXA | 
                  ACTIVE | 
                  -55 to 125 | 
                  25.62 | 1ku | 
                  CFP (WD) |   56 | 
                  1 | TUBE | 
                    | 
                
                
                  | SNJ54LVTH16501WD | 
                  ACTIVE | 
                  -55 to 125 | 
                  25.62 | 1ku | 
                  CFP (WD) |   56 | 
                  1 | TUBE | 
                    | 
                
              
              SN54LVTH16501 质量与无铅数据
              
                
                  | 器件 | 
                  环保计划* | 
                  铅/焊球涂层 | 
                  MSL 等级/回流焊峰 | 
                  环保信息与无铅 (Pb-free) | 
                  DPPM / MTBF / FIT 率 | 
                
                
                  | 5962-9677701QXA | 
                  TBD  | 
                  A42   | 
                  N/A for Pkg Type | 
                  5962-9677701QXA | 
                  5962-9677701QXA | 
                
                
                  | SNJ54LVTH16501WD | 
                  TBD  | 
                  A42   | 
                  N/A for Pkg Type | 
                  SNJ54LVTH16501WD | 
                  SNJ54LVTH16501WD | 
                
              
              SN54LVTH16501 应用技术支持与电子电路设计开发资源下载
              - SN54LVTH16501 数据资料   dataSheet 下载.PDF 
 
                - TI 德州仪器通用总线功能产品选型与价格 . xls 
 
                - Shelf-Life Evaluation of Lead-Free Component Finishes  (PDF  1305 KB)
 
                - Understanding and Interpreting Standard-Logic Data Sheets  (PDF  857 KB)
 
                - TI IBIS File Creation, Validation, and Distribution Processes  (PDF  380 KB)
 
                - Implications of Slow or Floating CMOS Inputs  (PDF  101 KB)
 
                - CMOS Power Consumption and CPD Calculation  (PDF  89 KB)
 
                - Designing With Logic  (PDF  186 KB)
 
                - Live Insertion  (PDF  150 KB)
 
                - Input and Output Characteristics of Digital Integrated Circuits  (PDF  1708 KB)
 
                - Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc  (PDF  43 KB) 
 
                - HiRel Unitrode Power Management Brochure  (PDF  206 KB)
 
                - LOGIC Pocket Data Book  (PDF  6001 KB)
 
                - HiRel Unitrode Power Management Brochure  (PDF  206 KB)
 
                - Logic Cross-Reference (PDF  2938 KB)