SN54HC164 8 位并行输出串行移位寄存器

These 8-bit shift registers feature AND-gated serial inputs and an asynchronous clear (CLR) input. The gated serial (A and B) inputs permit complete control over incoming data; a low at either input inhibits entry of the new data and resets the first flip-flop to the low level at the next clock (CLK) pulse. A high-level input enables the other input, which then determines the state of the first flip-flop. Data at the serial inputs can be changed while CLK is high or low, provided the minimum setup time requirements are met. Clocking occurs on the low-to-high-level transition of CLK.

	SN54HC164
Technology Family	HC
Rating	Military

SN54HC164 特性

• Wide Operating Voltage Range of 2 V to 6 V
• Outputs Can Drive Up To 10 LSTTL Loads
• Low Power Consumption, 80-μA Max ICC
• Typical tpd = 20 ns
• ±4-mA Output Drive at 5 V
• Low Input Current of 1 μA Max
• AND-Gated (Enable/Disable) Serial Inputs
• Fully Buffered Clock and Serial Inputs
• Direct Clear

SN54HC164 芯片订购指南

器件	状态	温度	价格	封装 | 引脚	封装数量 | 封装载体	丝印标记
SN54HC164J	ACTIVE	-55 to 125	16.23 | 1ku	CDIP (J) | 14	1 | TUBE
SNJ54HC164FK	ACTIVE	-55 to 125	17.37 | 1ku	LCCC (FK) | 20	1 | TUBE
SNJ54HC164J	ACTIVE	-55 to 125	23.81 | 1ku	CDIP (J) | 14	1 | TUBE
SNJ54HC164W	ACTIVE	-55 to 125	16.23 | 1ku	CFP (W) | 14	1 | TUBE

SN54HC164 质量与无铅数据

器件	环保计划*	铅/焊球涂层	MSL 等级/回流焊峰	环保信息与无铅 (Pb-free)	DPPM / MTBF / FIT 率
SN54HC164J	TBD	A42	N/A for Pkg Type	SN54HC164J	SN54HC164J
SNJ54HC164FK	TBD	POST-PLATE	N/A for Pkg Type	SNJ54HC164FK	SNJ54HC164FK
SNJ54HC164J	TBD	A42	N/A for Pkg Type	SNJ54HC164J	SNJ54HC164J
SNJ54HC164W	TBD	Call TI	N/A for Pkg Type	SNJ54HC164W	SNJ54HC164W

SN54HC164 应用技术支持与电子电路设计开发资源下载

1. SN54HC164 数据资料 dataSheet 下载.PDF
2. TI 德州仪器触发器/锁存器/寄存器产品选型与价格 . xls
3. Shelf-Life Evaluation of Lead-Free Component Finishes (PDF 1305 KB)
4. Understanding and Interpreting Standard-Logic Data Sheets (PDF 857 KB)
5. TI IBIS File Creation, Validation, and Distribution Processes (PDF 380 KB)
6. Implications of Slow or Floating CMOS Inputs (PDF 101 KB)
7. CMOS Power Consumption and CPD Calculation (PDF 89 KB)
8. Designing With Logic (PDF 186 KB)
9. Live Insertion (PDF 150 KB)
10. Input and Output Characteristics of Digital Integrated Circuits (PDF 1708 KB)
11. Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc (PDF 43 KB)
12. HiRel Unitrode Power Management Brochure (PDF 206 KB)
13. LOGIC Pocket Data Book (PDF 6001 KB)
14. HiRel Unitrode Power Management Brochure (PDF 206 KB)
15. Logic Cross-Reference (PDF 2938 KB)