LM3S1150 Stellaris 微处理器
The Stellaris(R) LM3S1150 microcontroller is based on the ARM(R) CortexTM-M3 controller core operating at up to 50 MHz, with 64 kB flash and 16 kB SRAM. The LM3S1150 also features real-time industrial connectivity, with 2 SSI / SPI controllers, an I2C interface, and 3 UARTs. The LM3S1150 microcontroller also features advanced motion control features, including 6 motion-control PWM outputs with dead-band, a quadrature encoder input for precise position monitoring, and a fault protection input for low-latency shutdown. Finally, the LM3S1150 microcontroller provides a 24-bit systick timer, 4 32-bit or 8 16-bit general-purpose timers, a watchdog timer, a battery-backed hibernation module with RTC and 256 bytes of non-volatile state-saving memory, a low drop-out voltage regulator so that only one supply voltage is required, brown-out reset, power-on reset controller, and up to 52 GPIOs.
|
LM3S1150 |
| Flash (KB) |
64 |
| RAM (KB) |
16 |
| StellarisWare in ROM |
No |
| Boot Loader in ROM |
0 |
| DMA |
0 |
| SafeRTOS |
0 |
| Max Speed (MHz) |
50 |
| Precision Oscillators |
No |
| Memory Protection Unit (MPU) |
Yes |
| Timers |
5 |
| RTC |
Yes |
| Watchdog Timers |
1 |
| Motion PWM |
6 |
| PWM Faults |
1 |
| Dead-Band Generator |
Yes |
| Capture Pins |
6 |
| QEI |
1 |
| EPI/EMIF |
No |
| Ethernet |
No |
| IEEE 1588 |
No |
| CAN |
0 |
| USB D, H/D, or OTG |
No |
| UART |
3 |
| UART Modem Status |
No |
| I2C |
1 |
| SSI/SPI |
2 |
| I2S |
No |
| ADC Units |
0 |
| ADC Channels |
0 |
| ADC Resolution (Bits) |
0 |
| ADC Sample Rate (kSPS) |
0 |
| ADC Ext Reference |
No |
| Internal Temp Sensor |
0 |
| Analog Comparators |
3 |
| Maximum 5-V Tolerant GPIOs |
52 |
| Dedicated 5-V Tolerant GPIOs |
7 |
| Digital Comparators |
0 |
| Battery-Backed Hibernation Module |
Yes |
| Internal LDO Voltage Regulator |
Yes |
| Active Current (mA) /Mhz |
pending |
| Standby Current (uA) |
pending |
| Operating Temperature Range (C) |
-40 to 105,-40 to 85 |
| Pin/Package |
100LQFP, 108NFBGA |
| Package Area (mm2) |
100,196 |
| Approx. Price (US$) |
3.15 | 1ku |
LM3S1150 特性
- 32-bit ARM(R) CortexTM-M3 50-MHz processor core with System Timer (SysTick), integrated Nested Vectored Interrupt Controller (NVIC), Memory Protection Unit (MPU), and Thumb-2 instruction set
- Full-featured debug solution with debug access via JTAG and Serial Wire interfaces, and IEEE 1149.1-1990 compliant Test Access Port (TAP) controller
- 64 KB single-cycle flash and 16 KB single-cycle SRAM
- Lower-power battery-backed Hibernation module with Real-Time Clock
- 7-52 GPIOs (depending on configuration) with programmable control for GPIO interrupts and pad configuration
- ARM FiRM-compliant Watchdog Timer ; plus four General-Purpose Timer Modules (GPTM), each of which provides two 16-bit timers/counters and can be configured to operate independently
- 10-bit Analog-to-Digital Converter (ADC) with analog input channels and a sample rate of samples/second
- Three fully programmable 16C550-type UARTs with IrDA support
- Two Synchronous Serial Interface (SSI) modules, supporting operation for Freescale SPI, MICROWIRE, or Texas Instruments synchronous serial interfaces
- Inter-Integrated Circuit (I2C) Interface, providing Standard (100 Kbps) and Fast (400 Kbps) transmission and support for sending and receiving data as either a master or a slave
- Three integrated analog comparators configurable for output to drive an output pin or generate an interrupt
- Three PWM generator blocks, each with one 16-bit counter, two PWM comparators, a PWM signal generator, a dead-band generator, and an interrupt selector
- Quadrature Encoder Interface (QEI) featuring position integrator to track encoder position and velocity capture using built-in timer
- Industrial and extended temperature RoHS-compliant 100-pin LQFP package and industrial-range RoHS-compliant 108-ball BGA package
LM3S1150 芯片订购指南
| 器件 |
状态 |
温度 |
价格 |
封装 | 引脚 |
封装数量 | 封装载体 |
丝印标记 |
| LM3S1150-EQC50-A2 |
ACTIVE |
-40 to 105 |
4.10 | 1ku |
LQFP (PZ) | 100 |
90 |
|
| LM3S1150-EQC50-A2T |
ACTIVE |
-40 to 105 |
4.15 | 1ku |
LQFP (PZ) | 100 |
1000 | LARGE T&R |
|
| LM3S1150-IBZ50-A2 |
ACTIVE |
-40 to 85 |
3.15 | 1ku |
NFBGA (ZCR) | 108 |
184 |
|
| LM3S1150-IBZ50-A2T |
ACTIVE |
-40 to 85 |
3.20 | 1ku |
NFBGA (ZCR) | 108 |
1500 | LARGE T&R |
|
| LM3S1150-IQC50-A2 |
ACTIVE |
-40 to 85 |
3.15 | 1ku |
LQFP (PZ) | 100 |
90 |
|
| LM3S1150-IQC50-A2T |
ACTIVE |
-40 to 85 |
3.20 | 1ku |
LQFP (PZ) | 100 |
1000 | LARGE T&R |
|
LM3S1150 质量与无铅数据
| 器件 |
环保计划* |
铅/焊球涂层 |
MSL 等级/回流焊峰 |
环保信息与无铅 (Pb-free) |
DPPM / MTBF / FIT 率 |
| LM3S1150-EQC50-A2 |
Green (RoHS & no Sb/Br) |
SN |
Level-3-260C-168 HR |
LM3S1150-EQC50-A2 |
LM3S1150-EQC50-A2 |
| LM3S1150-EQC50-A2T |
Green (RoHS & no Sb/Br) |
SN |
Level-3-260C-168 HR |
LM3S1150-EQC50-A2T |
LM3S1150-EQC50-A2T |
| LM3S1150-IBZ50-A2 |
Green (RoHS & no Sb/Br) |
SNAGCU |
Level-3-260C-168 HR |
LM3S1150-IBZ50-A2 |
LM3S1150-IBZ50-A2 |
| LM3S1150-IBZ50-A2T |
Green (RoHS & no Sb/Br) |
SNAGCU |
Level-3-260C-168 HR |
LM3S1150-IBZ50-A2T |
LM3S1150-IBZ50-A2T |
| LM3S1150-IQC50-A2 |
Green (RoHS & no Sb/Br) |
SN |
Level-3-260C-168 HR |
LM3S1150-IQC50-A2 |
LM3S1150-IQC50-A2 |
| LM3S1150-IQC50-A2T |
Green (RoHS & no Sb/Br) |
SN |
Level-3-260C-168 HR |
LM3S1150-IQC50-A2T |
LM3S1150-IQC50-A2T |
LM3S1150 应用技术支持与电子电路设计开发资源下载
- LM3S1150 数据资料 dataSheet 下载.PDF
- TI 德州仪器ARM 处理器选型与价格 . xls
- OMAP-L13x/AM1x Linux PSP Overview
- ARM Assembly Language Tools v4.7 User's Guide
- ARM Optimizing C/C++ Compiler v4.7 User's Guide
- Power Management for AM18xx/AM17xx Processors
- ARM Portfolio Technical Overview Brochure
- Software and Hardware Design Challenges due to Dynamic Raw NAND Market
- Programmable Real-Time Unit (PRU): Extending Functionality Of Existing SoCs
LM3S1150 工具与软件