CY74FCT16543T 具有三态输出的 16 位寄存收发器
              CY74FCT16543T 描述
       The CY74FCT16543T and CY74FCT162543T are 16-bit, high-speed, low power   latched transceivers that are organized as two independent 8-bit D-type latched   transceivers containing two sets of eight D-type latches with separate Latch   Enable (LEAB\, LEAB\) and Output Enable (OEAB\, OEAB\) controls for each set to   permit independent control of inputting and outputting in either direction of   data flow. For data flow from A to B, for example, the A-to-B input Enable   (CEAB\) must be LOW in order to enter data from A or to take data from B as   indicated in the truth table. With CAEB\ LOW, a LOW signal on the A-to-B Latch   Enable (LEAB\) makes the A-to-B latches transparent; a subsequent LOW-to-HIGH   transition of the LEAB\ signal puts the A latches in the storage mode and their   outputs no longer change with the A inputs.
       
              CY74FCT16543T 特性
              
              
                - Ioff supports partial-power-down mode operation.li   
                
 - Edge-rate control circuitry for significantly improved noise characteristics     
                
 - Typical output skew < 250 ps   
                
 - ESD > 2000V   
                
 - TSSOP (19.6-mil pitch) and SSOP (25-mil pitch) packages   
                
 - Industrial temperature range of -40°C to +85°C   
                
 - VCC = 5V ± 10%   
                
 - CY74FCT16543T Features:
                    
                      - 64 mA sink current, 32 mA source current   
                      
 - Typical VOLP (ground bounce) <1.0V at VCC = 5V,   TA = 25°C
 
                    
                 - CY74FCT162543T Features:
                    
                      - Balanced 24 mA output drivers   
                      
 - Reduced system switching noise   
                      
 - Typical VOLP (ground bounce) <0.6V at VCC = 5V,   TA = 25°C
 
                    
                 - CY74FCT162H543T Features:
                    
                      - Bus hold retains last active state   
                      
 - Eliminates the need for external pull-up or pull-down resistors
 
                    
                 
              
              CY74FCT16543T 芯片订购指南
              
                
                  | 器件 | 
                  状态 | 
                  温度 | 
                  价格(美元) | 
                  封装 | 引脚 | 
                  封装数量 | 封装载体 | 
                  丝印标记 | 
                
                
                  | CY74FCT16543TPVC | 
                  ACTIVE | 
                  -40 to 85 | 
                  2.35 | 1ku | 
                  SSOP (DL) | 56 | 
                  20 | TUBE | 
                    | 
                
                
                  | CY74FCT162543ETPVC | 
                  OBSOLETE | 
                  -40 to 85 | 
                    | 
                  SSOP (DL) | 56 | 
                    | 
                    | 
                
              
              CY74FCT16543T 质量与无铅数据
              
                
                  | 器件 | 
                  环保计划* | 
                  铅/焊球涂层 | 
                  MSL 等级/回流焊峰 | 
                  环保信息与无铅 (Pb-free) | 
                  DPPM / MTBF / FIT 率 | 
                
                
                  | CY74FCT16543TPVC | 
                  Green (RoHS & no Sb/Br)  | 
                  CU NIPDAU  | 
                  Level-1-260C-UNLIM | 
                  CY74FCT16543TPVC | 
                  CY74FCT16543TPVC | 
                
                
                  | CY74FCT162543ETPVC | 
                  Green (RoHS & no Sb/Br)  | 
                  CU NIPDAU  | 
                  Level-1-260C-UNLIM | 
                  CY74FCT162543ETPVC | 
                  CY74FCT162543ETPVC | 
                
              
              CY74FCT16543T 应用技术支持与电子电路设计开发资源下载
              
                - CY74FCT16543T 数据资料   dataSheet 下载.PDF 
 
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