TUSB6250 USB 2.0 低功耗高速 ATA/ATAPI 桥接器解决方案

The TUSB6250 is a USB 2.0 HS-capable function controller with an integrated UTMI compliant PHY. The TUSB6250 is intended as a USB 2.0 to ATA/ATAPI bridge for storage devices using a standard ATA or ATAPI interface.

The TUSB6250 is designed to utilize both the fast performance of the state machine and the programmability and flexibility of the embedded microcontroller and firmware. With the elaborative balance between the microcontroller unit (MCU) and the state machine, in addition to its embedded fast MCU (up to 30 MIPS), eight configurable endpoints, up to 40K bytes of configurable code, and data buffer SRAM, the TUSB6250 provides a bridge solution to meet both the performance and flexibility requirement of the next generation external storage devices

	TUSB6250
USB Speed	High
Number of Endpoints IN	4
Number of Endpoints OUT	4
Supply Voltage(s)(V)	3.3
MCU Speed(Max)(MIPs)	30
MCU Code Space(KBytes)	32
GPIO Pins(#)	16
Operating Temperature Range(C)	0 to 70
Pin/Package	80TQFP
Integrated MCU Architecture	8051 WARP
Application Interface	IDE,ATA,ATAPI

TUSB6250 特性

• Universal Serial Bus (USB)
  • Fully compliant with USB 2.0 specification: TID #40390418
  • Integrated USB 2.0 UTMI compliant transceiver (PHY)
  • Supports USB high speed (HS, 480 Mbits/sec) and full speed (FS, 12 Mbits/sec)
  • Supports USB suspend/resume and remote wake-up operation
  • Supports USB device-unique serial number by using on-chip unique die ID
  • Supports eight configurable endpoints (four input and four output) with a user-programmable buffer size, in addition to the default control endpoint (endpoint 0):
    • Each endpoint can be configured for interrupt and bulk (double buffered) transfers.
    • All endpoints share the 4K byte data buffer implemented in the SPRAM (single port SRAM).
• Microcontroller Unit (MCU)
  • Integrated 60-MHz 8051 microcontroller with two clocks per cycle (up to 30 MIPS)
  • Application code is loadable from either the USB host or the external EEPROM (via the I2C interface)
  • 8K bytes of ROM for the boot loader
  • 1152 bytes of RAM with multiple bank selectable capability for the internal data buffer (IDATA space)
  • 40K bytes of RAM, configurable for either code or data space, which provides flexibility to the end product application:
    • 32K byte code RAM with 8K byte sector buffer data space
    • 16K byte code RAM with 24K byte sector buffer data space
    • 8K byte code RAM with 32K byte sector buffer data space
  • Master I2C interface controller for external device accesses capable of 100 Kbits/sec or 400 Kbits/sec transfer speed.
  • Up to 13 GPIOs and three general-purpose open-drain outputs can be used for end product specific functions

TUSB6250 芯片订购指南

器件	状态	温度	价格	封装 | 引脚	封装数量 | 封装载体	丝印标记
TUSB6250PFC	ACTIVE	0 to 70	2.80 | 1ku	TQFP (PFC) | 80	96 | JEDEC TRAY (10+1)
TUSB6250PFCG4	ACTIVE	0 to 70	2.80 | 1ku	TQFP (PFC) | 80	96 | JEDEC TRAY (10+1)
TUSB6250PFCR	OBSOLETE			TQFP (PFC) | 80

TUSB6250 质量与无铅数据

器件	环保计划*	铅/焊球涂层	MSL 等级/回流焊峰	环保信息与无铅 (Pb-free)	DPPM / MTBF / FIT 率
TUSB6250PFC	Green (RoHS & no Sb/Br)	CU NIPDAU	Level-4-260C-72 HR	TUSB6250PFC	TUSB6250PFC
TUSB6250PFCG4	Green (RoHS & no Sb/Br)	CU NIPDAU	Level-4-260C-72 HR	TUSB6250PFCG4	TUSB6250PFCG4

TUSB6250 应用技术支持与电子电路设计开发资源下载

1. TUSB6250 数据资料 dataSheet 下载.PDF
2. TI 德州仪器USB选型与价格 . xls
3. 所选封装材料的热学和电学性质 (PDF 645 KB)
4. 使用数字隔离器设计隔离式 I2C 总线接口 (zhct119.PDF, 339 KB)
5. 高性能SERDES及其在CPRI 接口的应用分析 (zhca076.HTM, 8 KB)
6. 1Q 2011 Issue Analog Applications Journal (slyt399.PDF, 964 KB)
7. 接口选择指南 (Rev. D) (PDF 2994 KB)
8. Signaling Rate vs. Distance for Differential Buffers (PDF 420 KB)
9. Q1 2009 Issue Analog Applications Journal (slyt319.PDF, 1.39 MB)
10. Isolated RS-485 Reference Design (PDF 80 KB)
11. 无铅组件涂层的保存期评估 (PDF 1305 KB)
12. Analog Signal Chain Guide (8.62 MB)
13. Industrial Interface IC Solutions (101 KB)