TSB83AA23 TSB83AA23 IEEE Std 1394b-2002
The TSB83AA23 is an integrated IEEE Std 1394b-2002 link-layer controller (LLC) design and physical layer (PHY) design combined in a single package to meet the demanding requirements of today’s 1394 bus applications. The TSB83AA23 device is capable of exceptional 800-Mbps performance; thus, providing the throughput and bandwidth to move data efficiently and quickly between the PCI and 1394 buses. The TSB83AA23 device also provides outstanding ultralow power operation and intelligent power-management capabilities. The device provides the IEEE 1394 LLC function and PHY function and is compatible with 100-Mbps, 200-Mbps, 400-Mbps, and 800-Mbps serial-bus data rates.
The TSB83AA23 operates as the interface between 33-MHz/32-bit PCI local bus and an IEEE Std 1394a-2000 or IEEE Std 1394b-2002 serial-bus interface
|
TSB83AA23 |
| Speed(Max)(Mbps) |
800 |
| FIFO(kb) |
9 |
| Pin/Package |
167NFBGA |
| Operating Temperature Range(°C) |
0 to 70 |
| Rating |
Catalog |
TSB83AA23 特性
- Fully Supports Provisions of IEEE Std 1394b-2002 Revision 1.33+ at 1-Gigabit Signaling Rates
- Fully Supports Provisions of IEEE Std 1394a-2000 and IEEE Std l394-1995 for High-Performance Serial Bus
- Fully Interoperable With FirewireTM, i.LINKTM, and SB1394 Implementations of IEEE Std 1394
- Provides Three Fully Backward-Compatible, (IEEE Std 1394a-2000 Fully Compliant) Bilingual IEEE Std 1394b-2002 Cable Ports at up to 800 Megabits per Second (Mbps)
- Full IEEE Std 1394a-2000 Support Includes:
- Connection Debounce
- Arbitrated Short Reset
- Multispeed Concatenation
- Arbitration Acceleration
- Fly-By Concatenation
- Port Disable/Suspend/Resume
- Extended Resume Signaling for Compatibility With Legacy Digital Video (DV) Devices
- Power-Down Features to Conserve Energy in Battery-Powered Applications
- Low-Power Sleep Mode
- Fully Compliant With Open Host Controller Interface (OHCI) Requirements
- Cable Power Presence Monitoring
- Cable Ports Monitor Line Conditions for Active Connection to Remote Node
- Register Bits Give Software Control of Contender Bit, Power-Class Bits, Link Active Control Bit, and IEEE Std 1394a-2000 Features
- Interoperable With Other 1394 Physical Layers (PHYs) Using 1.8-V, 3.3-V, and 5-V Supplies
- Low-Jitter, External Crystal Oscillator Provides Transmit and Receive Data at 100/200/400/800 Mbps and Link-Layer Controller (LLC) Clock at 49.152 MHz and 98.304 MHz
TSB83AA23 芯片订购指南
| 器件 |
状态 |
温度 (oC) |
价格 |
封装 | 引脚 |
封装数量 | 封装载体 |
丝印标记 |
| TSB83AA23ZAY |
ACTIVE |
0 to 70 |
9.00 | 1ku |
NFBGA (ZAY) | 167 |
160 | JEDEC TRAY (5+1) |
|
TSB83AA23 质量与无铅数据
| 器件 |
环保计划* |
铅/焊球涂层 |
MSL 等级/回流焊峰 |
环保信息与无铅 (Pb-free) |
DPPM / MTBF / FIT 率 |
| TSB83AA23ZAY |
Pb-Free (RoHS) |
SNAGCU |
Level-3-260C-168 HR |
TSB83AA23ZAY |
TSB83AA23ZAY |
TSB83AA23 应用技术支持与电子电路设计开发资源下载
- TSB83AA23 数据资料 dataSheet 下载.PDF
- TI 德州仪器1394 集成器件产品选型与价格 . xls
- Analog Signal Chain Guide (8.62 MB)
- Industrial Interface IC Solutions (101 KB)