TS3V712EL 具有集成电平转换器的 7 通道 1:2 视频开关
The TS3V712EL is a high bandwidth, 7-channel video demultiplexer for switching between a single VGA source and one of two end points. The device is designed for ensuring video signal integrity and minimizing video signal attenuation by providing high bandwidth of 1.3 GHz.
The TS3V712EL has integrated level shifting buffers for the HSYNC and VSYNC signals which provide voltage level translation between 3.3 V and 5 V logic. The SCL and SDA lines use NMOS switches which clamp the output voltage to 1 V below VDD.
The video signals are protected against ESD with integrated diodes to VDD and GND that support levels up to ±2-kV Contact Discharge (IEC61000-4-2) and 7-kV Human Body Model (JESD22-A114E).
|
TS3V712EL |
Vcc min(V) |
3 |
Vcc max(V) |
5.5 |
No. of Bits |
7 |
ron(max)(ohms) |
4 |
ICC(uA) |
200 |
tpd max(ns) |
0.25 |
TS3V712EL 特性
- Supports 7-Channel VGA Signals (R, G, B, HSYNC, VSYNC, DDC CLK, and DDC DAT)
- Integrated Level-Shifting Buffers for HSYNC and VSYNC Channels
- Operating Voltage
- VDD = 3.3 V ±10%
- VDD_5 = 5 V ±10%
- High Bandwidth of 1.3 GHz (–3 dB)
- Low ON-State Resistance and Input/Output Capacitance
- rON = 4 (Typ)
- CON = 8 pF (Typ)
- Voltage Clamping NMOS Switches for SCL and SDA Channels
- ESD Performance (Pins 12–15, 17–22, 24–27)
- ±2-kV Contact Discharge (IEC61000-4-2)
- 7-kV Human Body Model (to GND)
- ESD Performance (All Pins)
- 3-kV Human Body Model (JESD22-A114E)
- 32-Pin Quad Flat Pack No-Lead [QFN (RTG)] Package
- APPLICATIONS
- Notebook Computers
- Docking Stations
- KVM Switches
TS3V712EL 芯片订购指南
器件 |
状态 |
温度 |
价格 |
封装 | 引脚 |
封装数量 | 封装载体 |
丝印标记 |
TS3V712ELRTGR |
ACTIVE |
-40 to 85 |
2.20 | 100u |
WQFN (RTG) | 32 |
3000 | LARGE T&R |
|
TS3V712EL 质量与无铅数据
器件 |
环保计划* |
铅/焊球涂层 |
MSL 等级/回流焊峰 |
环保信息与无铅 (Pb-free) |
DPPM / MTBF / FIT 率 |
TS3V712ELRTGR |
Green (RoHS & no Sb/Br) |
CU NIPDAU |
Level-3-260C-168 HR |
TS3V712ELRTGR |
TS3V712ELRTGR |
TS3V712EL 应用技术支持与电子电路设计开发资源下载
- TS3V712EL 数据资料 dataSheet 下载.PDF
- TI 德州仪器信号开关产品选型与价格 . xls
- Logic Guide 2009 (PDF 4263 KB)
- 防止模拟开关的额外功耗 (PDF 392 KB) (PDF 1305 KB)
- Understanding and Interpreting Standard-Logic Data Sheets (PDF 857 KB)
- TI IBIS File Creation, Validation, and Distribution Processes (PDF 380 KB)
- Implications of Slow or Floating CMOS Inputs (PDF 101 KB)
- CMOS Power Consumption and CPD Calculation (PDF 89 KB)
- Designing With Logic (PDF 186 KB)
- Live Insertion (PDF 150 KB)
- Input and Output Characteristics of Digital Integrated Circuits (PDF 1708 KB)
- Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc (PDF 43 KB)
- HiRel Unitrode Power Management Brochure (PDF 206 KB)
- LOGIC Pocket Data Book (PDF 6001 KB)
- HiRel Unitrode Power Management Brochure (PDF 206 KB)
- Logic Cross-Reference (PDF 2938 KB)