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TPD4S1394 具有带电插入检测电路的 Firewire ESD 钳位

The TPD4S1394 provides robust system level ESD solution for the IEEE.1394 port along with a live insertion detection mechanism for high-speed lines interfacing a low-voltage, ESD sensitive core chipset. This device protects and monitors up to two differential input pairs. The optimized line capacitance allows to protect the data lines with data rate in excess of 1.6 GHz without degrading signal integrity.

The TPD4S1394 incorporates a live insertion circuit whose output state changes when improper voltage levels are present on the input data lines. The FWPWR_EN signal controls an external FireWire port power switch. During the live insertion event if there is a floating GND or a high level signal at the D+, D– pins, the internal comparator will detect the changes and pull the FWPWR_EN signal to low state

TPD4S1394
Number of Channels 4
IEC 61000-4-2 Contact(+/- kV) +/- 6
IO Capacitance(Typ)(pF) 1.5
Breakdown Voltage(Min)(V) 4
Operating Temperature Range(°C) -40 to 85
TPD4S1394 特性
TPD4S1394 芯片订购指南
器件 状态 温度 价格 封装 | 引脚 封装数量 | 封装载体 丝印标记
TPD4S1394DQLR ACTIVE -40 to 85 0.23 | 1ku X2SON (DQL) | 8 3000 | LARGE T&R  
TPD4S1394 质量与无铅数据
器件 环保计划* 铅/焊球涂层 MSL 等级/回流焊峰 环保信息与无铅 (Pb-free) DPPM / MTBF / FIT 率
TPD4S1394DQLR Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPD4S1394DQLR TPD4S1394DQLR
TPD4S1394 应用技术支持与电子电路设计开发资源下载
  1. TPD4S1394 数据资料 dataSheet 下载.PDF
  2. TI 德州仪器ESD 解决方案选型与价格 . xls
  3. 所选封装材料的热学和电学性质 (PDF 645 KB)
  4. 接口选择指南 (Rev. D) (PDF 2994 KB)
  5. ESD Protection Guide (PDF 2885 KB)
  6. Reading and Understanding an ESD Protection Datasheet (PDF 2523 KB)
  7. Q1 2009 Issue Analog Applications Journal (slyt319.PDF, 1.39 MB)
  8. Isolated CAN Reference Design (PDF 48 KB)
  9. Isolated RS-485 Reference Design (PDF 80 KB)
  10. 无铅组件涂层的保存期评估 (PDF 1305 KB)
  11. Isolated CAN EVM User's Guide (PDF 1168 KB)
  12. Energy Harvesting: Solar Solutions Guide (PDF 409 KB)
  13. Analog Signal Chain Guide (8.62 MB)
  14. Industrial Interface IC Solutions (101 KB)