The TPD2E009 provides 2 ESD clamp circuits with flow-through pin mapping for ease of board layout. This device has been designed to protect sensitive components which are connected to ultra high-speed data and transmission lines. The TPD2E009 offers protection from stress caused by ESD (electrostatic discharge). This device also offers 5 A (8/20 us) peak pulse current ratings per IEC 61000-4-5 (lightning) specification.
The monolithic silicon technology allows matching between the differential signal pairs. The less than differential 0.05-pF capacitance ensures that the differential signal distortion due to added ESD clamp remains minimal. The 0.7-pF line capacitance is suitable for high-speed data rate (in excess of 6 Gbps).
The TPD2E009 conforms to IEC61000-4-2 (Level 4) ESD protection. The DRT (1 mm × 1 mm) package is offered for space-saving portable applications. The industry standard DBZ (2.4 mm × 2.9 mm) package offers additional flexibility in the board layout for the system designer.
The TPD2E009 is characterized for operation over ambient air temperature range of –40°C to 85°C
| TPD2E009 | |
| Number of Channels | 2 |
| IEC 61000-4-2 Contact(+/- kV) | +/-8 |
| IEC 61000-4-2 Air-Gap(+/- kV) | +/-8 |
| IO Capacitance(Typ)(pF) | 0.7 |
| Differential Capacitance(pF) | 0.01 |
| Breakdown Voltage(Min)(V) | 9 |
| IO Leakage Current(nA) | 10 |
| Operating Temperature Range(°C) | -40 to 85 |
| 器件 | 状态 | 温度 | 价格 | 封装 | 引脚 | 封装数量 | 封装载体 | 丝印标记 |
| TPD2E009DBZR | ACTIVE | -40 to 85 | 0.15 | 1ku | SOT-23 (DBZ) | 3 | 3000 | LARGE T&R | |
| TPD2E009DRTR | ACTIVE | -40 to 85 | 0.15 | 1ku | SOT (DRT) | 3 | 3000 | LARGE T&R | |
| TPD2E009DRYR | PREVIEW | -40 to 85 | SON (DRY) | 6 | 5000 | LARGE T&R |
| 器件 | 环保计划* | 铅/焊球涂层 | MSL 等级/回流焊峰 | 环保信息与无铅 (Pb-free) | DPPM / MTBF / FIT 率 |
| TPD2E009DBZR | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | TPD2E009DBZR | TPD2E009DBZR |
| TPD2E009DRTR | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | TPD2E009DRTR | TPD2E009DRTR |