| TLC2543-Q1 | |
| Resolution(Bits) | 12 |
| Sample Rate (max) | 66kSPS |
| Architecture | SAR |
| Power Consumption(Typ)(mW) | 5 |
| DNL(Max)(+/-LSB) | 1 |
| INL(Max)(+/-LSB) | 1 |
| No Missing Codes(Bits) | 12 |
| No. of Supplies | 1 |
| Analog Voltage AV/DD(Min)(V) | 4.5 |
| Analog Voltage AV/DD(Max)(V) | 5.5 |
| Logic Voltage DV/DD(Min)(V) | 4.5 |
| Logic Voltage DV/DD(Max)(V) | 5.5 |
| Input Configuration Range | Vref |
| Reference Mode | Ext |
| Rating | Automotive |
| Pin/Package | 20SSOP |
| # Input Channels | 11 |
| Operating Temperature Range(°C) | -40 to 85 |
The TLC2543 is a 12-bit, switched-capacitor, successive-approximation, analog-to-digital converters. Each device, with three control inputs [chip select (CS), the input-output clock, and the address input (DATA INPUT)], is designed for communication with the serial port of a host processor or peripheral through a serial 3-state output. The device allows high-speed data transfers from the host.
In addition to the high-speed converter and versatile control capability, the device has an on-chip 14-channel multiplexer that can select any one of 11 inputs or any one of three internal self-test voltages. The sample-and-hold function is automatic. At the end of conversion, the end-of-conversion (EOC) output goes high to indicate that conversion is complete.
| 器件 | 状态 | 温度(oC) | 价格（美元） | 封装 | 引脚 |
| TLC2543IDBRG4Q1 | ACTIVE | -40 to 85 | 5.60 | 1ku | SSOP(DB) | 20 |
| TLC2543IDBRQ1 | ACTIVE | -40 to 85 | 5.60 | 1ku | SSOP(DB) | 20 |
| TLC2543QDWRQ1 | OBSOLETE | -40 to 125 | SOIC (DW) | 20 |