The SN74LVTH32374 is a 32-bit edge-triggered D-type flip-flop designed for low-voltage (3.3-V) VCC operation, but with the capability to provide a TTL interface to a 5-V system environment. This device is particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.
This device can be used as four 8-bit flip-flops, two 16-bit flip-flops, or one 32-bit flip-flop. On the positive transition of the clock (CLK), the Q outputs of the flip-flop take on the logic levels set up at the data (D) inputs.
A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high or low logic levels) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without interface or pullup components.
OE does not affect internal operations of the flip-flop. Old data can be retained or new data can be entered while the outputs are in the high-impedance state.
When VCC is between 0 and 1.5 V, the device is in the high-impedance state during power up or power down. However, to ensure the high-impedance state above 1.5 V, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
This device is fully specified for hot-insertion applications using Ioff and power-up 3-state. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. The power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down, which prevents driver conflict.
Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended
| SN74LVTH32374 | |
| Voltage Nodes(V) | 3.3, 2.7 |
| Vcc range(V) | 2.7 to 3.6 |
| Input Level | TTL |
| Output Level | TTL |
| Output Drive(mA) | -32/64 |
| No. of Outputs | 32 |
| No. of Bits | 32 |
| Static Current | 10 mA |
| th(ns) | 0.8 |
| tpd max(ns) | 4.5 |
| tsu(ns) | 1.8 |
| Logic | True |
| Technology Family | LVT |
| Rating | Catalog |
| 器件 | 状态 | 温度 | 价格（美元） | 封装 | 引脚 | 封装数量 | 封装载体 | 丝印标记 |
| SN74LVTH32374GKER | NRND | -40 to 85 | 3.20 | 1ku | LFBGA (GKE) | 96 | 1000 | LARGE T&R | |
| SN74LVTH32374ZKER | ACTIVE | -40 to 85 | 1.80 | 1ku | LFBGA (GKE) | 96 | 1000 | LARGE T&R |
| 器件 | 环保计划* | 铅/焊球涂层 | MSL 等级/回流焊峰 | 环保信息与无铅 (Pb-free) | DPPM / MTBF / FIT 率 |
| SN74LVTH32374GKER | Green (RoHS & no Sb/Br) | SNAGCU | Level-3-260C-168 HR | SN74LVTH32374GKER | SN74LVTH32374GKER |
| SN74LVTH32374ZKER | TBD | SNPB | Level-2-235C-1 YEAR | SN74LVTH32374ZKER | SN74LVTH32374ZKER |