SN74LVC2T45-EP 具有可配置电压转换和三态输出的增强型产品双位双电源收发器
This dual-bit noninverting bus transceiver uses two separate configurable power-supply rails. The A port is designed to track VCCA. VCCA accepts any supply voltage from 1.65 V to 5.5 V. The B port is designed to track VCCB. VCCB accepts any supply voltage from 1.65 V to 5.5 V. This allows for universal low-voltage bidirectional translation between any of the 1.8-V, 2.5-V, 3.3-V, and 5-V voltage nodes.
The SN74LVC2T45 is designed for asynchronous communication between two data buses. The logic levels of the direction-control (DIR) input activate either the B-port outputs or the A-port outputs. The device transmits data from the A bus to the B bus when the B-port outputs are activated, and from the B bus to the A bus when the A-port outputs are activated
|
SN74LVC2T45-EP |
| Voltage Nodes(V) |
1.8,2.5,3.3,5 |
| Vcc range(V) |
1.65 to 5.5 |
| Logic |
True |
| No. of Bits |
2 |
| Output Drive(mA) |
-32,32 |
| Technology Family |
LVC |
| Pin/Package |
8SM8 |
| Operating Temperature Range(°C) |
-55 to 125 |
| Rating |
HiRel Enhanced Product |
SN74LVC2T45-EP 特性
- Available in the Texas Instruments NanoFreeTM Package
- Fully Configurable Dual-Rail Design Allows Each Port to
Operate Over the Full 1.65-V to 5.5-V Power-Supply Range
- VCC Isolation Feature – If Either VCC Input Is at GND,
Both Ports Are in the High-Impedance State
- DIR Input Circuit Referenced to VCCA
- Low Power Consumption, 10-uA Max ICC
- ±24-mA Output Drive at 3.3 V
- Ioff Supports Partial-Power-Down Mode Operation
- Max Data Rates
- 420 Mbps (3.3-V to 5-V Translation)
- 210 Mbps (Translate to 3.3 V)
- 140 Mbps (Translate to 2.5 V)
- 75 Mbps (Translate to 1.8 V)
- Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
- ESD Protection Exceeds JESD 22
- 4000-V Human-Body Model (A114-A)
- 200-V Machine Model (A115-A)
- 1000-V Charged-Device Model (C101)
- SUPPORTS DEFENSE, AEROSPACE, AND MEDICAL APPLICATIONS
- Controlled Baseline
- One Assembly/Test Site
SN74LVC2T45-EP 芯片订购指南
| 器件 |
状态 |
温度 |
价格（美元） |
封装 | 引脚 |
封装数量 | 封装载体 |
丝印标记 |
| SN74LVC2T45MDCTTEP |
ACTIVE |
-55 to 125 |
1.62 | 100u |
SM8 (DCT) | 8 |
250 | SMALL T&R |
|
| V62/09604-01XE |
ACTIVE |
-55 to 125 |
1.62 | 100u |
SM8 (DCT) | 8 |
250 | SMALL T&R |
|
SN74LVC2T45-EP 质量与无铅数据
| 器件 |
环保计划* |
铅/焊球涂层 |
MSL 等级/回流焊峰 |
环保信息与无铅 (Pb-free) |
DPPM / MTBF / FIT 率 |
| SN74LVC2T45MDCTTEP |
Green (RoHS & no Sb/Br) |
CU NIPDAU |
Level-1-260C-UNLIM |
SN74LVC2T45MDCTTEP |
SN74LVC2T45MDCTTEP |
| V62/09604-01XE |
Green (RoHS & no Sb/Br) |
CU NIPDAU |
Level-1-260C-UNLIM |
V62/09604-01XE |
V62/09604-01XE |
SN74LVC2T45-EP 应用技术支持与电子电路设计开发资源下载
- SN74LVC2T45-EP 数据资料 dataSheet 下载.PDF
- TI 德州仪器电压电平转换产品选型与价格 . xls
- Shelf-Life Evaluation of Lead-Free Component Finishes (PDF 1305 KB)
- Understanding and Interpreting Standard-Logic Data Sheets (PDF 857 KB)
- TI IBIS File Creation, Validation, and Distribution Processes (PDF 380 KB)
- Implications of Slow or Floating CMOS Inputs (PDF 101 KB)
- CMOS Power Consumption and CPD Calculation (PDF 89 KB)
- Designing With Logic (PDF 186 KB)
- Live Insertion (PDF 150 KB)
- Input and Output Characteristics of Digital Integrated Circuits (PDF 1708 KB)
- Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc (PDF 43 KB)
- HiRel Unitrode Power Management Brochure (PDF 206 KB)
- LOGIC Pocket Data Book (PDF 6001 KB)
- HiRel Unitrode Power Management Brochure (PDF 206 KB)
- Logic Cross-Reference (PDF 2938 KB)