SN74LVC2G79 双路上升沿 D 类触发器

This dual positive-edge-triggered D-type flip-flop is designed for 1.65-V to 5.5-V VCC operation.

When data at the data (D) input meets the setup time requirement, the data is transferred to the Q output on the positive-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not directly related to the rise time of the clock pulse. Following the hold-time interval, data at the D input can be changed without affecting the levels at the outputs.

NanoFreeTM package technology is a major breakthrough in IC packaging concepts, using the die as the package.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down

	SN74LVC2G79
Pin/Package	8DSBGA, 8SM8, 8US8
Operating Temperature Range(°C)	-40 to 85
IOL(mA)	32
IOH(mA)	-32
Vcc max(V)	5.5
Technology Family	LVC
Vcc min(V)	1.65
Approx. Price (US$)	0.18 | 1ku
No. of Gates	2
tpd max(ns)	4.5
ICC(uA)	5
Rating	Catalog

SN74LVC2G79 特性

• Available in the Texas Instruments NanoFreeTM Package
• Supports 5-V VCC Operation
• Inputs Accept Voltages to 5.5 V
• Max tpd of 4.2 ns at 3.3 V
• Low Power Consumption, 10-uA Max ICC
• ±24-mA Output Drive at 3.3 V
• Typical VOLP (Output Ground Bounce) <0.8 V at VCC = 3.3 V, TA = 25°C
• Typical VOHV (Output VOH Undershoot) >2 V at VCC = 3.3 V, TA = 25°C
• Ioff Feature Supports Partial-Power-Down Mode Operation
• Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
• ESD Protection Exceeds JESD 22
  • 2000-V Human-Body Model (A114-A)
  • 200-V Machine Model (A115-A)
  • 1000-V Charged-Device Model (C101)

SN74LVC2G79 芯片订购指南

器件	状态	温度	价格（美元）	封装 | 引脚	封装数量 | 封装载体	丝印标记
SN74LVC2G74DCTR	ACTIVE	-40 to 85	0.18 | 1ku	SM8 (DCT) | 8	3000 | LARGE T&R
SN74LVC2G74DCTRE4	ACTIVE	-40 to 85	0.18 | 1ku	SM8 (DCT) | 8	3000 | LARGE T&R
SN74LVC2G74DCTRG4	ACTIVE	-40 to 85	0.18 | 1ku	SM8 (DCT) | 8	3000 | LARGE T&R
SN74LVC2G74DCUR	ACTIVE	-40 to 85	0.18 | 1ku	US8 (DCU) | 8	3000 | LARGE T&R
SN74LVC2G74DCURE4	ACTIVE	-40 to 85	0.18 | 1ku	US8 (DCU) | 8	3000 | LARGE T&R
SN74LVC2G74DCURG4	ACTIVE	-40 to 85	0.18 | 1ku	US8 (DCU) | 8	3000 | LARGE T&R
SN74LVC2G74YZPR	ACTIVE	-40 to 85	0.22 | 1ku	DSBGA (YZD) | 8	3000 | LARGE T&R

SN74LVC2G79 质量与无铅数据

器件	环保计划*	铅/焊球涂层	MSL 等级/回流焊峰	环保信息与无铅 (Pb-free)	DPPM / MTBF / FIT 率
SN74LVC2G74DCTR	Green (RoHS & no Sb/Br)	CU NIPDAU	Level-1-260C-UNLIM	SN74LVC2G74DCTR	SN74LVC2G74DCTR
SN74LVC2G74DCTRE4	Green (RoHS & no Sb/Br)	CU NIPDAU	Level-1-260C-UNLIM	SN74LVC2G74DCTRE4	SN74LVC2G74DCTRE4
SN74LVC2G74DCTRG4	Green (RoHS & no Sb/Br)	CU NIPDAU	Level-1-260C-UNLIM	SN74LVC2G74DCTRG4	SN74LVC2G74DCTRG4
SN74LVC2G74DCUR	Green (RoHS & no Sb/Br)	CU NIPDAU	Level-1-260C-UNLIM	SN74LVC2G74DCUR	SN74LVC2G74DCUR
SN74LVC2G74DCURE4	Green (RoHS & no Sb/Br)	CU NIPDAU	Level-1-260C-UNLIM	SN74LVC2G74DCURE4	SN74LVC2G74DCURE4
SN74LVC2G74DCURG4	Green (RoHS & no Sb/Br)	CU NIPDAU	Level-1-260C-UNLIM	SN74LVC2G74DCURG4	SN74LVC2G74DCURG4
SN74LVC2G74YZPR	Green (RoHS & no Sb/Br)	SNAGCU	Level-1-260C-UNLIM	SN74LVC2G74YZPR	SN74LVC2G74YZPR

SN74LVC2G79 应用技术支持与电子电路设计开发资源下载

1. SN74LVC2G79 数据资料 dataSheet 下载.PDF
2. TI 德州仪器触发器/锁存器/寄存器产品选型与价格 . xls
3. Shelf-Life Evaluation of Lead-Free Component Finishes (PDF 1305 KB)
4. Understanding and Interpreting Standard-Logic Data Sheets (PDF 857 KB)
5. TI IBIS File Creation, Validation, and Distribution Processes (PDF 380 KB)
6. Implications of Slow or Floating CMOS Inputs (PDF 101 KB)
7. CMOS Power Consumption and CPD Calculation (PDF 89 KB)
8. Designing With Logic (PDF 186 KB)
9. Live Insertion (PDF 150 KB)
10. Input and Output Characteristics of Digital Integrated Circuits (PDF 1708 KB)
11. Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc (PDF 43 KB)
12. HiRel Unitrode Power Management Brochure (PDF 206 KB)
13. LOGIC Pocket Data Book (PDF 6001 KB)
14. HiRel Unitrode Power Management Brochure (PDF 206 KB)
15. Logic Cross-Reference (PDF 2938 KB)