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SN74LVC2G132 具有施密特触发器输入的双路 2 输入与非门

This dual 2-input NAND gate with Schmitt-trigger inputs is designed for 1.65-V to 5.5-V VCC operation.

The SN74LVC2G132 contains two inverters and performs the Boolean function Y = A o B or Y = A + B in positive logic. The device functions as two independent inverters, but because of Schmitt action, it has different input threshold levels for positive-going (VT+) and negative-going (VT-) signals.

NanoFreeTM package technology is a major breakthrough in IC packaging concepts, using the die as the package.

This device can be triggered from the slowest of input ramps and still give clean jitter-free output signals.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down

SN74LVC2G132
Pin/Package 8DSBGA, 8SM8, 8US8
Operating Temperature Range(°C) -40 to 85
IOL(mA) 32
IOH(mA) -32
Vcc max(V) 5.5
Technology Family LVC
Vcc min(V) 1.65
Approx. Price (US$) 0.18 | 1ku
tpd max(ns) 4.4
ICC(uA) 10
Rating Catalog
SN74LVC2G132 特性
SN74LVC2G132 芯片订购指南
器件 状态 温度 价格 封装 | 引脚 封装数量 | 封装载体 丝印标记
74LVC2G132DCTRE4 ACTIVE -40 to 85 0.18 | 1ku SM8 (DCT) | 8 3000 | LARGE T&R  
74LVC2G132DCTRG4 ACTIVE -40 to 85 0.18 | 1ku SM8 (DCT) | 8 3000 | LARGE T&R  
74LVC2G132DCURE4 ACTIVE -40 to 85 0.18 | 1ku US8 (DCU) | 8 3000 | LARGE T&R  
74LVC2G132DCURG4 ACTIVE -40 to 85 0.18 | 1ku US8 (DCU) | 8 3000 | LARGE T&R  
74LVC2G132DCUTE4 ACTIVE -40 to 85 0.41 | 1ku US8 (DCU) | 8 250 | SMALL T&R  
SN74LVC2G132DCTR ACTIVE -40 to 85 0.18 | 1ku US8 (DCU) | 8 3000 | LARGE T&R  
SN74LVC2G132DCUR ACTIVE -40 to 85 0.18 | 1ku US8 (DCU) | 8 3000 | LARGE T&R  
SN74LVC2G132DCUT ACTIVE -40 to 85 0.41 | 1ku US8 (DCU) | 8 250 | SMALL T&R  
SN74LVC2G132YZPR ACTIVE -40 to 85 0.22 | 1ku DSBGA (YZD) | 8 3000 | LARGE T&R  
SN74LVC2G132 质量与无铅数据
器件 环保计划* 铅/焊球涂层 MSL 等级/回流焊峰 环保信息与无铅 (Pb-free) DPPM / MTBF / FIT 率
74LVC2G132DCTRE4 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 74LVC2G132DCTRE4 74LVC2G132DCTRE4
74LVC2G132DCTRG4 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 74LVC2G132DCTRG4 74LVC2G132DCTRG4
74LVC2G132DCURE4 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 74LVC2G132DCURE4 74LVC2G132DCURE4
74LVC2G132DCURG4 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 74LVC2G132DCURG4 74LVC2G132DCURG4
74LVC2G132DCUTE4 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 74LVC2G132DCUTE4 74LVC2G132DCUTE4
SN74LVC2G132DCTR Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LVC2G132DCTR SN74LVC2G132DCTR
SN74LVC2G132DCUR Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LVC2G132DCUR SN74LVC2G132DCUR
SN74LVC2G132DCUT Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LVC2G132DCUT SN74LVC2G132DCUT
SN74LVC2G132YZPR Green (RoHS & no Sb/Br) SNAGCU Level-1-260C-UNLIM SN74LVC2G132YZPR SN74LVC2G132YZPR
SN74LVC2G132 应用技术支持与电子电路设计开发资源下载
  1. SN74LVC2G132 数据资料 dataSheet 下载.PDF
  2. TI 德州仪器门电路产品选型与价格 . xls
  3. Logic Guide 2009 (PDF 4263 KB)
  4. Shelf-Life Evaluation of Lead-Free Component Finishes (PDF 1305 KB)
  5. Understanding and Interpreting Standard-Logic Data Sheets (PDF 857 KB)
  6. TI IBIS File Creation, Validation, and Distribution Processes (PDF 380 KB)
  7. Implications of Slow or Floating CMOS Inputs (PDF 101 KB)
  8. CMOS Power Consumption and CPD Calculation (PDF 89 KB)
  9. Designing With Logic (PDF 186 KB)
  10. Live Insertion (PDF 150 KB)
  11. Input and Output Characteristics of Digital Integrated Circuits (PDF 1708 KB)
  12. Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc (PDF 43 KB)
  13. HiRel Unitrode Power Management Brochure (PDF 206 KB)
  14. LOGIC Pocket Data Book (PDF 6001 KB)
  15. HiRel Unitrode Power Management Brochure (PDF 206 KB)
  16. Logic Cross-Reference (PDF 2938 KB)