SN74LVC1G17-EP 增强型产品单路施密特触发缓冲器
This single Schmitt-trigger buffer is designed for 1.65-V to 5.5-V VCC operation.
The SN74LVC1G17 contains one buffer and performs the Boolean function Y = A. The device functions as an independent buffer, but because of Schmitt action, it may have different input threshold levels for positive-going (VT+) and negative-going (VT-) signals.
NanoStarTM and NanoFreeTM package technology is a major breakthrough in IC packaging concepts, using the die as the package.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down
|
SN74LVC1G17-EP |
| Pin/Package |
5SC70, 5SOT-23 |
| Operating Temperature Range(°C) |
-55 to 125 |
| IOL(mA) |
32 |
| IOH(mA) |
-32 |
| Output Drive(mA) |
+\-24 |
| Vcc max(V) |
6.5 |
| Technology Family |
LVC |
| Vcc range(V) |
-0.5 to 6.5 |
| tpd max(ns) |
4.6 |
| ICC(uA) |
10 |
SN74LVC1G17-EP 特性
- Controlled Baseline
- One Assembly/Test Site, One Fabrication Site
- Extended Temperature Performance of -55°C to 125°C
- Enhanced Diminishing Manufacturing Sources (DMS) Support
- Qualification Pedigree(1)
- Supports 5-V VCC Operation
- Max tpd of 4.6 ns at 3.3 V
- Low Power Consumption, 10 uA Max ICC
- ±24 mA Output Drive at 3.3 V
- Ioff Supports Partial Power Down Mode Operation
- Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
- ESD Protection Exceeds JESD 22
- 2000-V Human-Body Model (A114-A)
- 200-V Machine Model (A115-A)
- 1000-V Charged-Device Model (C101)
SN74LVC1G17-EP 芯片订购指南
| 器件 |
状态 |
温度 |
价格 |
封装 | 引脚 |
封装数量 | 封装载体 |
丝印标记 |
| CLVC1G17MDCKREPG4 |
ACTIVE |
-55 to 125 |
0.43 | 1ku |
SC70 (DCK) | 5 |
3000 | LARGE T&R |
|
| SN74LVC1G17MDCKREP |
ACTIVE |
-55 to 125 |
0.43 | 1ku |
SC70 (DCK) | 5 |
3000 | LARGE T&R |
|
SN74LVC1G17-EP 质量与无铅数据
| 器件 |
环保计划* |
铅/焊球涂层 |
MSL 等级/回流焊峰 |
环保信息与无铅 (Pb-free) |
DPPM / MTBF / FIT 率 |
| CLVC1G17MDCKREPG4 |
Green (RoHS & no Sb/Br) |
CU NIPDAU |
Level-1-260C-UNLIM |
CLVC1G17MDCKREPG4 |
CLVC1G17MDCKREPG4 |
| SN74LVC1G17MDCKREP |
Green (RoHS & no Sb/Br) |
CU NIPDAU |
Level-1-260C-UNLIM |
SN74LVC1G17MDCKREP |
SN74LVC1G17MDCKREP |
SN74LVC1G17-EP 应用技术支持与电子电路设计开发资源下载
- SN74LVC1G17-EP 数据资料 dataSheet 下载.PDF
- TI 德州仪器小尺寸逻辑器件产品选型与价格 . xls
- Logic Guide 2009 (PDF 4263 KB)
- Shelf-Life Evaluation of Lead-Free Component Finishes (PDF 1305 KB)
- Understanding and Interpreting Standard-Logic Data Sheets (PDF 857 KB)
- TI IBIS File Creation, Validation, and Distribution Processes (PDF 380 KB)
- Implications of Slow or Floating CMOS Inputs (PDF 101 KB)
- CMOS Power Consumption and CPD Calculation (PDF 89 KB)
- Designing With Logic (PDF 186 KB)
- Live Insertion (PDF 150 KB)
- Input and Output Characteristics of Digital Integrated Circuits (PDF 1708 KB)
- Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc (PDF 43 KB)
- HiRel Unitrode Power Management Brochure (PDF 206 KB)
- LOGIC Pocket Data Book (PDF 6001 KB)
- HiRel Unitrode Power Management Brochure (PDF 206 KB)
- Logic Cross-Reference (PDF 2938 KB)