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SN74LVC1G08 单路 2 输入正与门

The SN74LVC1G08 performs the Boolean function or Y = A o B or Y = A\ + B\ in positive logic.

NanoFreeTM package technology is a major breakthrough in IC packaging concepts, using the die as the package.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

SN74LVC1G08
Rating Catalog
Technology Family LVC
SN74LVC1G08 特性
SN74LVC1G08 芯片订购指南
器件 状态 温度 价格 封装 | 引脚 封装数量 | 封装载体 丝印标记
SN74LVC1G08DBVR ACTIVE -40 to 85 0.11 | 1ku SOT-23 (DBV) | 5 3000 | LARGE T&R  
SN74LVC1G08DBVRE4 ACTIVE -40 to 85 0.11 | 1ku SOT-23 (DBV) | 5 3000 | LARGE T&R  
SN74LVC1G08DBVRG4 ACTIVE -40 to 85 0.11 | 1ku SOT-23 (DBV) | 5 3000 | LARGE T&R  
SN74LVC1G08DBVT ACTIVE -40 to 85 0.44 | 1ku SOT-23 (DBV) | 5 250 | SMALL T&R  
SN74LVC1G08DBVTE4 ACTIVE -40 to 85 0.44 | 1ku SOT-23 (DBV) | 5 250 | SMALL T&R  
SN74LVC1G08DBVTG4 ACTIVE -40 to 85 0.44 | 1ku SOT-23 (DBV) | 5 250 | SMALL T&R  
SN74LVC1G08DCKR ACTIVE -40 to 85 0.11 | 1ku SC70 (DCK) | 5 3000 | LARGE T&R  
SN74LVC1G08DCKRE4 ACTIVE -40 to 85 0.11 | 1ku SC70 (DCK) | 5 3000 | LARGE T&R  
SN74LVC1G08DCKRG4 ACTIVE -40 to 85 0.11 | 1ku SC70 (DCK) | 5 3000 | LARGE T&R  
SN74LVC1G08DCKT ACTIVE -40 to 85 0.44 | 1ku SC70 (DCK) | 5 250 | SMALL T&R  
SN74LVC1G08DCKTE4 ACTIVE -40 to 85 0.44 | 1ku SC70 (DCK) | 5 250 | SMALL T&R  
SN74LVC1G08DCKTG4 ACTIVE -40 to 85 0.44 | 1ku SC70 (DCK) | 5 250 | SMALL T&R  
SN74LVC1G08DRLR ACTIVE -40 to 85 0.15 | 1ku SOT (DRL) | 5 4000 | LARGE T&R  
SN74LVC1G08DRLRG4 ACTIVE -40 to 85 0.15 | 1ku SOT (DRL) | 5 4000 | LARGE T&R  
SN74LVC1G08DRYR ACTIVE -40 to 85 0.15 | 1ku SON (DRY) | 6 5000 | LARGE T&R  
SN74LVC1G08DRYRG4 ACTIVE -40 to 85 0.15 | 1ku SON (DRY) | 6 5000 | LARGE T&R  
SN74LVC1G08YZPR ACTIVE -40 to 85 0.24 | 1ku DSBGA (YZP) | 5 3000 | LARGE T&R  
SN74LVC1G08 质量与无铅数据
器件 环保计划* 铅/焊球涂层 MSL 等级/回流焊峰 环保信息与无铅 (Pb-free) DPPM / MTBF / FIT 率
SN74LVC1G08DBVR Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LVC1G08DBVR SN74LVC1G08DBVR
SN74LVC1G08DBVRE4 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LVC1G08DBVRE4 SN74LVC1G08DBVRE4
SN74LVC1G08DBVRG4 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LVC1G08DBVRG4 SN74LVC1G08DBVRG4
SN74LVC1G08DBVT Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LVC1G08DBVT SN74LVC1G08DBVT
SN74LVC1G08DBVTE4 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LVC1G08DBVTE4 SN74LVC1G08DBVTE4
SN74LVC1G08DBVTG4 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LVC1G08DBVTG4 SN74LVC1G08DBVTG4
SN74LVC1G08DCKR Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LVC1G08DCKR SN74LVC1G08DCKR
SN74LVC1G08DCKRE4 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LVC1G08DCKRE4 SN74LVC1G08DCKRE4
SN74LVC1G08DCKRG4 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LVC1G08DCKRG4 SN74LVC1G08DCKRG4
SN74LVC1G08DCKT Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LVC1G08DCKT SN74LVC1G08DCKT
SN74LVC1G08DCKTE4 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LVC1G08DCKTE4 SN74LVC1G08DCKTE4
SN74LVC1G08DCKTG4 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LVC1G08DCKTG4 SN74LVC1G08DCKTG4
SN74LVC1G08DRLR Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LVC1G08DRLR SN74LVC1G08DRLR
SN74LVC1G08DRLRG4 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LVC1G08DRLRG4 SN74LVC1G08DRLRG4
SN74LVC1G08DRYR Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LVC1G08DRYR SN74LVC1G08DRYR
SN74LVC1G08DRYRG4 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LVC1G08DRYRG4 SN74LVC1G08DRYRG4
SN74LVC1G08YZPR Green (RoHS & no Sb/Br) SNAGCU Level-1-260C-UNLIM SN74LVC1G08YZPR SN74LVC1G08YZPR
SN74LVC1G08 应用技术支持与电子电路设计开发资源下载
  1. SN74LVC1G08 数据资料 dataSheet 下载.PDF
  2. TI 德州仪器门电路产品选型与价格 . xls
  3. Logic Guide 2009 (PDF 4263 KB)
  4. Shelf-Life Evaluation of Lead-Free Component Finishes (PDF 1305 KB)
  5. Understanding and Interpreting Standard-Logic Data Sheets (PDF 857 KB)
  6. TI IBIS File Creation, Validation, and Distribution Processes (PDF 380 KB)
  7. Implications of Slow or Floating CMOS Inputs (PDF 101 KB)
  8. CMOS Power Consumption and CPD Calculation (PDF 89 KB)
  9. Designing With Logic (PDF 186 KB)
  10. Live Insertion (PDF 150 KB)
  11. Input and Output Characteristics of Digital Integrated Circuits (PDF 1708 KB)
  12. Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc (PDF 43 KB)
  13. HiRel Unitrode Power Management Brochure (PDF 206 KB)
  14. LOGIC Pocket Data Book (PDF 6001 KB)
  15. HiRel Unitrode Power Management Brochure (PDF 206 KB)
  16. Logic Cross-Reference (PDF 2938 KB)