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SN74LV595A 具有三态输出寄存器的 8 位移位寄存器

The ’LV595A devices are 8-bit shift registers designed for 2-V to 5.5-V VCC operation.

These devices contain an 8-bit serial-in, parallel-out shift register that feeds an 8-bit D-type storage register. The storage register has parallel 3-state outputs. Separate clocks are provided for both the shift and storage register. The shift register has a direct overriding clear (SRCLR) input, serial (SER) input, and a serial output for cascading. When the output-enable (OE) input is high, all outputs except QH, are in the high-impedance state.

Both the shift register clock (SRCLK) and storage register clock (RCLK) are positive-edge triggered. If both clocks are connected together, the shift register always is one clock pulse ahead of the storage register

SN74LV595A
Technology Family LV-A
Rating Catalog
SN74LV595A 特性
SN74LV595A 芯片订购指南
器件 状态 温度 价格 封装 | 引脚 封装数量 | 封装载体 丝印标记
SN74LV595AD ACTIVE 0 to 70 49.90 | 1ku SOIC (DW) | 16 40 | TUBE LV595A
SN74LV595ADE4 ACTIVE 0 to 70 49.90 | 1ku SOIC (DW) | 16 40 | TUBE LV595A
SN74LV595ADG4 ACTIVE 0 to 70 49.90 | 1ku SOIC (DW) | 16 40 | TUBE LV595A
SN74LV595AN ACTIVE 0 to 70 54.90 | 1ku PDIP (N) | 16 15 | TUBE SN74LV595AN
SN74LV595ANE4 ACTIVE 0 to 70 54.90 | 1ku PDIP (N) | 16 15 | TUBE SN74LV595AN
SN74LV595A 质量与无铅数据
器件 环保计划* 铅/焊球涂层 MSL 等级/回流焊峰 环保信息与无铅 (Pb-free) DPPM / MTBF / FIT 率
SN74LV595AD Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LV595AD SN74LV595AD
SN74LV595ADE4 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LV595ADE4 SN74LV595ADE4
SN74LV595ADG4 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LV595ADG4 SN74LV595ADG4
SN74LV595AN Pb-Free (RoHS) CU NIPDAU N/A for Pkg Type SN74LV595AN SN74LV595AN
SN74LV595ANE4 Pb-Free (RoHS) CU NIPDAU N/A for Pkg Type SN74LV595ANE4 SN74LV595ANE4
SN74LV595A 应用技术支持与电子电路设计开发资源下载
  1. SN74LV595A 数据资料 dataSheet 下载.PDF
  2. TI 德州仪器触发器/锁存器/寄存器产品选型与价格 . xls
  3. Shelf-Life Evaluation of Lead-Free Component Finishes (PDF 1305 KB)
  4. Understanding and Interpreting Standard-Logic Data Sheets (PDF 857 KB)
  5. TI IBIS File Creation, Validation, and Distribution Processes (PDF 380 KB)
  6. Implications of Slow or Floating CMOS Inputs (PDF 101 KB)
  7. CMOS Power Consumption and CPD Calculation (PDF 89 KB)
  8. Designing With Logic (PDF 186 KB)
  9. Live Insertion (PDF 150 KB)
  10. Input and Output Characteristics of Digital Integrated Circuits (PDF 1708 KB)
  11. Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc (PDF 43 KB)
  12. HiRel Unitrode Power Management Brochure (PDF 206 KB)
  13. LOGIC Pocket Data Book (PDF 6001 KB)
  14. HiRel Unitrode Power Management Brochure (PDF 206 KB)
  15. Logic Cross-Reference (PDF 2938 KB)