SN74LV4051A-EP 增强型产品 8 通道模拟多路复用器/多路解复用器

This 8-channel CMOS analog multiplexer/demultiplexer is designed for 2-V to 5.5-V VCC operation.

The SN74LV4051A handles both analog and digital signals. Each channel permits signals with amplitudes up to 5.5 V (peak) to be transmitted in either direction.

Applications include signal gating, chopping, modulation or demodulation (modem), and signal multiplexing for analog-to-digital and digital-to-analog conversion systems

	SN74LV4051A-EP
Number of Channels	8
Pd(Typ)(mW)	-
Configuration	1 X 1:8 MUX
ron(max)(ohms)	190
ICC(uA)	20
tpd max(ns)	7
Technology Family	LV-A
Vcc range(V)	2.0 to 5.5
Voltage Nodes(V)	5, 3.3, 2.5
Rating	HiRel Enhanced Product
Pin/Package	16SOIC, 16TSSOP
Operating Temperature Range(°C)	-40 to 105

SN74LV4051A-EP 特性

• Controlled Baseline
  • One Assembly/Test Site, One Fabrication Site
• Extended Temperature Performance of –40°C to 105°C
• Enhanced Diminishing Manufacturing Sources (DMS) Support
• Enhanced Product-Change Notification
• Qualification Pedigree
• 2-V to 5.5-V VCC Operation
• Support Mixed-Mode Voltage Operation on All Ports
• High On-Off Output-Voltage Ratio
• Low Crosstalk Between Switches
• Individual Switch Controls
• Extremely Low Input Current
• Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
• ESD Protection Exceeds JESD 22
  • 2000-V Human-Body Model (A114-A)
  • 200-V Machine Model (A115-A)
  • 1000-V Charged-Device Model (C101)

SN74LV4051A-EP 芯片订购指南

器件	状态	温度	价格	封装 | 引脚	封装数量 | 封装载体	丝印标记
SN74LV4051ATDREP	ACTIVE	-40 to 105	0.94 | 1ku	SOIC (D) | 16	2500 | LARGE T&R
V62/03664-01YE	ACTIVE	-40 to 105	0.94 | 1ku	SOIC (D) | 16	2500 | LARGE T&R

SN74LV4051A-EP 质量与无铅数据

器件	环保计划*	铅/焊球涂层	MSL 等级/回流焊峰	环保信息与无铅 (Pb-free)	DPPM / MTBF / FIT 率
SN74LV4051ATDREP	Green (RoHS & no Sb/Br)	CU NIPDAU	Level-1-260C-UNLIM	SN74LV4051ATDREP	SN74LV4051ATDREP
V62/03664-01YE	Green (RoHS & no Sb/Br)	CU NIPDAU	Level-1-260C-UNLIM	V62/03664-01YE	V62/03664-01YE

SN74LV4051A-EP 应用技术支持与电子电路设计开发资源下载

1. SN74LV4051A-EP 数据资料 dataSheet 下载.PDF
2. TI 德州仪器信号开关产品选型与价格 . xls
3. Logic Guide 2009 (PDF 4263 KB)
4. 防止模拟开关的额外功耗 (PDF 392 KB) (PDF 1305 KB)
5. Understanding and Interpreting Standard-Logic Data Sheets (PDF 857 KB)
6. TI IBIS File Creation, Validation, and Distribution Processes (PDF 380 KB)
7. Implications of Slow or Floating CMOS Inputs (PDF 101 KB)
8. CMOS Power Consumption and CPD Calculation (PDF 89 KB)
9. Designing With Logic (PDF 186 KB)
10. Live Insertion (PDF 150 KB)
11. Input and Output Characteristics of Digital Integrated Circuits (PDF 1708 KB)
12. Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc (PDF 43 KB)
13. HiRel Unitrode Power Management Brochure (PDF 206 KB)
14. LOGIC Pocket Data Book (PDF 6001 KB)
15. HiRel Unitrode Power Management Brochure (PDF 206 KB)
16. Logic Cross-Reference (PDF 2938 KB)