SN74LV4040A-EP 增强型产品 12 位异步二进制计数器

The ’LV4040A devices are 12-bit asynchronous binary counters with the outputs of all stages available externally. A high level at the clear (CLR) input asynchronously clears the counter and resets all outputs low. The count is advanced on a high-to-low transition at the clock (CLK) input. Applications include time-delay circuits, counter controls, and frequency-dividing circuits.

These devices are fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the devices when they are powered down

	SN74LV4040A-EP
Rating	Military
Technology Family	LV-A

SN74LV4040A-EP 特性

• Controlled Baseline
  • One Assembly
  • Test Site
  • One Fabrication Site
• Extended Temperature Performance of -55°C to 125°C
• Enhanced Diminishing Manufacturing Sources (DMS) Support
• Enhanced Product-Change Notification
• Qualification Pedigree(1)
• 2-V to 5.5-V VCC Operation
• Typical VOLP (Output Ground Bounce) <0.8 V at VCC = 3.3 V, TA = 25°C
• Typical VOHV (Output VOH Undershoot) >2.3 V at VCC = 3.3 V, TA = 25°C
• Support Mixed-Mode Voltage Operation on All Ports
• High On-Off Output-Voltage Ratio
• Low Crosstalk Between Switches
• Individual Switch Controls
• Extremely Low Input Current
• Ioff Supports Partial-Power-Down Mode Operation
• Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
• ESD Protection Exceeds JESD 22
  • 2000-V Human-Body Model (A114-A)

SN74LV4040A-EP 芯片订购指南

器件	状态	温度	价格	封装 | 引脚	封装数量 | 封装载体	丝印标记
SN74LV4040A-EPD	ACTIVE	0 to 70	0.40 | 1ku	SOIC (DW) | 16	40 | TUBE
SN74LV4040A-EPDE4	ACTIVE	0 to 70	0.40 | 1ku	SOIC (DW) | 16	40 | TUBE
SN74LV4040A-EPDG4	ACTIVE	0 to 70	0.40 | 1ku	SOIC (DW) | 16	40 | TUBE
SN74LV4040A-EPDR	ACTIVE	0 to 70	0.33 | 1ku	SOIC (DW) | 16	2500 | LARGE T&R
SN74LV4040A-EPDRE4	ACTIVE	0 to 70	0.33 | 1ku	SOIC (DW) | 16	2500 | LARGE T&R
SN74LV4040A-EPDRG4	ACTIVE	0 to 70	0.33 | 1ku	SOIC (DW) | 16	2500 | LARGE T&R
SN74LV4040A-EPN	ACTIVE	0 to 70	0.35 | 1ku	PDIP (N) | 16	25 | TUBE
SN74LV4040A-EPNE4	ACTIVE	0 to 70	0.35 | 1ku	PDIP (N) | 16	25 | TUBE

SN74LV4040A-EP 质量与无铅数据

器件	环保计划*	铅/焊球涂层	MSL 等级/回流焊峰	环保信息与无铅 (Pb-free)	DPPM / MTBF / FIT 率
SN74LV4040A-EPD	Green (RoHS & no Sb/Br)	CU NIPDAU	Level-1-260C-UNLIM	SN74LV4040A-EPD	SN74LV4040A-EPD
SN74LV4040A-EPDE4	Green (RoHS & no Sb/Br)	CU NIPDAU	Level-1-260C-UNLIM	SN74LV4040A-EPDE4	SN74LV4040A-EPDE4
SN74LV4040A-EPDG4	Green (RoHS & no Sb/Br)	CU NIPDAU	Level-1-260C-UNLIM	SN74LV4040A-EPDG4	SN74LV4040A-EPDG4
SN74LV4040A-EPDR	Green (RoHS & no Sb/Br)	CU NIPDAU	Level-1-260C-UNLIM	SN74LV4040A-EPDR	SN74LV4040A-EPDR
SN74LV4040A-EPDRE4	Green (RoHS & no Sb/Br)	CU NIPDAU	Level-1-260C-UNLIM	SN74LV4040A-EPDRE4	SN74LV4040A-EPDRE4
SN74LV4040A-EPDRG4	Green (RoHS & no Sb/Br)	CU NIPDAU	Level-1-260C-UNLIM	SN74LV4040A-EPDRG4	SN74LV4040A-EPDRG4
SN74LV4040A-EPN	Pb-Free (RoHS)	CU NIPDAU	N/A for Pkg Type	SN74LV4040A-EPN	SN74LV4040A-EPN
SN74LV4040A-EPNE4	Pb-Free (RoHS)	CU NIPDAU	N/A for Pkg Type	SN74LV4040A-EPNE4	SN74LV4040A-EPNE4

SN74LV4040A-EP 应用技术支持与电子电路设计开发资源下载

1. SN74LV4040A-EP 数据资料 dataSheet 下载.PDF
2. TI 德州仪器MSI 功能产品选型与价格 . xls
3. Logic Guide 2009 (PDF 4263 KB)
4. Shelf-Life Evaluation of Lead-Free Component Finishes (PDF 1305 KB)
5. Understanding and Interpreting Standard-Logic Data Sheets (PDF 857 KB)
6. TI IBIS File Creation, Validation, and Distribution Processes (PDF 380 KB)
7. Implications of Slow or Floating CMOS Inputs (PDF 101 KB)
8. CMOS Power Consumption and CPD Calculation (PDF 89 KB)
9. Designing With Logic (PDF 186 KB)
10. Live Insertion (PDF 150 KB)
11. Input and Output Characteristics of Digital Integrated Circuits (PDF 1708 KB)
12. Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc (PDF 43 KB)
13. HiRel Unitrode Power Management Brochure (PDF 206 KB)
14. LOGIC Pocket Data Book (PDF 6001 KB)
15. HiRel Unitrode Power Management Brochure (PDF 206 KB)
16. Logic Cross-Reference (PDF 2938 KB)