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SN74LS697 具有输出寄存器和多路复用三态输出的同步 4 位加/减二进制计数器

These low-power Schottky LSI devices incorporate synchronous up/down counters, four-bit D-type registers, and quadruple two-line to one-line multiplexers with three state outputs in a single 20-pin package. The up/down counters are programmable from the data inputs and feature enable P\ and enable T\ and a ripple-carry output for easy expansion. The register/counter select input R/C\, selects the counter when low and the register when high for the three-state outputs, QA, QB, QC, and QD. These outputs are rated at 12 and 24 milliamperes (54LS/74LS) for good bus driving performance.

Both the counter CCK and register clock RCK are positive-edge triggered. The counter clear CCLR\ is active low and is asynchronous on the 'LS696 and 'LS697, synchronous on the 'LS699

SN74LS697
Rating Catalog
Technology Family LS
SN74LS697 特性
SN74LS697 芯片订购指南
器件 状态 温度 价格 封装 | 引脚 封装数量 | 封装载体 丝印标记
SN74LS697DW ACTIVE 0 to 70 4.85 | 1ku SOIC (DW) | 20 25 | TUBE  
SN74LS697DWE4 ACTIVE 0 to 70 4.85 | 1ku SOIC (DW) | 20 25 | TUBE  
SN74LS697DWG4 ACTIVE 0 to 70 4.85 | 1ku SOIC (DW) | 20 25 | TUBE  
SN74LS697N ACTIVE 0 to 70 5.35 | 1ku PDIP (N) | 20 20 | TUBE  
SN74LS697NE4 ACTIVE 0 to 70 5.35 | 1ku PDIP (N) | 20 20 | TUBE  
SN74LS697 质量与无铅数据
器件 环保计划* 铅/焊球涂层 MSL 等级/回流焊峰 环保信息与无铅 (Pb-free) DPPM / MTBF / FIT 率
SN74LS697DW Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LS697DW SN74LS697DW
SN74LS697DWE4 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LS697DWE4 SN74LS697DWE4
SN74LS697DWG4 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LS697DWG4 SN74LS697DWG4
SN74LS697N Pb-Free (RoHS) CU NIPDAU N/A for Pkg Type SN74LS697N SN74LS697N
SN74LS697NE4 Pb-Free (RoHS) CU NIPDAU N/A for Pkg Type SN74LS697NE4 SN74LS697NE4
SN74LS697 应用技术支持与电子电路设计开发资源下载
  1. SN74LS697 数据资料 dataSheet 下载.PDF
  2. TI 德州仪器MSI 功能产品选型与价格 . xls
  3. Logic Guide 2009 (PDF 4263 KB)
  4. Shelf-Life Evaluation of Lead-Free Component Finishes (PDF 1305 KB)
  5. Understanding and Interpreting Standard-Logic Data Sheets (PDF 857 KB)
  6. TI IBIS File Creation, Validation, and Distribution Processes (PDF 380 KB)
  7. Implications of Slow or Floating CMOS Inputs (PDF 101 KB)
  8. CMOS Power Consumption and CPD Calculation (PDF 89 KB)
  9. Designing With Logic (PDF 186 KB)
  10. Live Insertion (PDF 150 KB)
  11. Input and Output Characteristics of Digital Integrated Circuits (PDF 1708 KB)
  12. Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc (PDF 43 KB)
  13. HiRel Unitrode Power Management Brochure (PDF 206 KB)
  14. LOGIC Pocket Data Book (PDF 6001 KB)
  15. HiRel Unitrode Power Management Brochure (PDF 206 KB)
  16. Logic Cross-Reference (PDF 2938 KB)