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SN74LS593 具有输入锁存器的移位寄存器

The SN74LS593 comes in a 16-pin package and consists of an 8-bit storage latch feeding a parallel-in, serial-out 8-bit shift register. Both the storage register and shift register have positive-edge triggered clocks. The shift register also has direct load (from storage) and clear inputs.

The SN74LS593 comes in a 20-pin package and has all the features of the SN74LS593 plus 3-state I/O ports that provide parallel shift register outputs and also has multiplexed serial data inputs

SN74LS593
Technology Family LS
Rating Catalog
SN74LS593 特性
SN74LS593 芯片订购指南
器件 状态 温度 价格 封装 | 引脚 封装数量 | 封装载体 丝印标记
SN74LS593D ACTIVE 0 to 70 3.20 | 1ku SOIC (DW) | 16 25 | TUBE  
SN74LS593N ACTIVE 0 to 70 2.90 | 1ku PDIP (N) | 16 20 | TUBE  
SN74LS593NE4 ACTIVE 0 to 70 2.90 | 1ku PDIP (N) | 16 20 | TUBE  
SN74LS593 质量与无铅数据
器件 环保计划* 铅/焊球涂层 MSL 等级/回流焊峰 环保信息与无铅 (Pb-free) DPPM / MTBF / FIT 率
SN74LS593D Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LS593D SN74LS593D
SN74LS593N Pb-Free (RoHS) CU NIPDAU N/A for Pkg Type SN74LS593N SN74LS593N
SN74LS593N3 Pb-Free (RoHS) CU NIPDAU N/A for Pkg Type SN74LS593NE3 SN74LS593N3
SN74LS593NE4 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LS593NE4 SN74LS593NE4
SN74LS593 应用技术支持与电子电路设计开发资源下载
  1. Shelf-Life Evaluation of Lead-Free Component Finishes (PDF 1305 KB)
  2. Understanding and Interpreting Standard-Logic Data Sheets (PDF 857 KB)
  3. TI IBIS File Creation, Validation, and Distribution Processes (PDF 380 KB)
  4. Implications of Slow or Floating CMOS Inputs (PDF 101 KB)
  5. CMOS Power Consumption and CPD Calculation (PDF 89 KB)
  6. Designing With Logic (PDF 186 KB)
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  9. Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc (PDF 43 KB)
  10. HiRel Unitrode Power Management Brochure (PDF 206 KB)
  11. LOGIC Pocket Data Book (PDF 6001 KB)
  12. HiRel Unitrode Power Management Brochure (PDF 206 KB)
  13. Logic Cross-Reference (PDF 2938 KB)