SN74LS181 算术逻辑部件/功能生成器
The 'LS181 and 'S181 are arithmetic logic units (ALU)/function generators that have a complexity of 75 equivalent gates on a monolithic chip. These circuits perform 16 binary arithmetic operations on two 4-bit words as shown in Tables 1 and 2. These operations are selected by the four function-select lines (S0, S1, S2, S3) and include addition, subtraction, decrement, and straight transfer. When performing arithmetic manipulations, the internal carries must be enabled by applying a low-level voltage to the mode control input (M). A full carry look-ahead scheme is made available in these devices for fast, simultaneous carry generation by means of two cascade-outputs (pins 15 and 17) for the four bits in the package.
|
SN74LS181 |
| Rating |
Catalog |
| Technology Family |
LS |
SN74LS181 特性
- Full Look-Ahead for High-Speed Operations on Long Words
- Input Clamping Diodes Minimize Transmission-Line Effects
- Darlington Outputs Reduce Turn-Off Time
- Arithmetic Operating Modes:
- Addition
- Subtraction
- Shift Operand A One Position
- Magnitude Comparison
- Plus Twelve Other Arithmetic Operations
- Logic Function Modes:
- Exclusive-OR
- Comparator
- AND, NAND, OR, NOR
- Plus Ten Other Logic Operations
SN74LS181 芯片订购指南
| 器件 |
状态 |
温度 |
价格 |
封装 | 引脚 |
封装数量 | 封装载体 |
丝印标记 |
| SN74LS181N |
ACTIVE |
0 to 70 |
5.50 | 1ku |
PDIP (N) | 24 |
15 | TUBE |
|
| SN74LS181NE4 |
ACTIVE |
0 to 70 |
5.50 | 1ku |
PDIP (N) | 24 |
15 | TUBE |
|
SN74LS181 质量与无铅数据
| 器件 |
环保计划* |
铅/焊球涂层 |
MSL 等级/回流焊峰 |
环保信息与无铅 (Pb-free) |
DPPM / MTBF / FIT 率 |
| SN74LS181N |
Pb-Free (RoHS) |
CU NIPDAU |
N/A for Pkg Type |
SN74LS181N |
SN74LS181N |
| SN74LS181NE4 |
Pb-Free (RoHS) |
CU NIPDAU |
N/A for Pkg Type |
SN74LS181NE4 |
SN74LS181NE4 |
SN74LS181 应用技术支持与电子电路设计开发资源下载
- SN74LS181 数据资料 dataSheet 下载.PDF
- TI 德州仪器MSI 功能产品选型与价格 . xls
- Logic Guide 2009 (PDF 4263 KB)
- Shelf-Life Evaluation of Lead-Free Component Finishes (PDF 1305 KB)
- Understanding and Interpreting Standard-Logic Data Sheets (PDF 857 KB)
- TI IBIS File Creation, Validation, and Distribution Processes (PDF 380 KB)
- Implications of Slow or Floating CMOS Inputs (PDF 101 KB)
- CMOS Power Consumption and CPD Calculation (PDF 89 KB)
- Designing With Logic (PDF 186 KB)
- Live Insertion (PDF 150 KB)
- Input and Output Characteristics of Digital Integrated Circuits (PDF 1708 KB)
- Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc (PDF 43 KB)
- HiRel Unitrode Power Management Brochure (PDF 206 KB)
- LOGIC Pocket Data Book (PDF 6001 KB)
- HiRel Unitrode Power Management Brochure (PDF 206 KB)
- Logic Cross-Reference (PDF 2938 KB)