SN74HC573A-Q1 具有三态输出的汽车类八路透明 D 类锁存器

This octal transparent D-type latch features 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. It is particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.

While the latch-enable (LE) input is high, the Q outputs respond to the data (D) inputs. When LE is low, the outputs are latched to retain the data that was set up.

A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high or low logic levels) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without interface or pullup components

	SN74HC573A-Q1
Voltage Nodes(V)	6, 5, 2
Rating	Automotive

SN74HC573A-Q1 特性

• Qualified for Automotive Applications
• Wide Operating Voltage Range of 2 V to 6 V
• High-Current 3-State Outputs Drive Bus Lines Directly or up to 15 LSTTL Loads
• Low Power Consumption, 80-uA Max ICC
• Typical tpd = 21 ns
• ±6-mA Output Drive at 5 V
• Low Input Current of 1 uA Max
• Bus-Structured Pinout

SN74HC573A-Q1 芯片订购指南

器件	状态	温度	价格（美元）	封装 | 引脚	封装数量 | 封装载体	丝印标记
SN74HC573AQDWRQ1	ACTIVE	-40 to 125	0.27 | 1ku	SOIC (DW) | 20	2000
SN74HC573AQPWRG4Q1	ACTIVE	-40 to 125	0.27 | 1ku	TSSOP (PW) | 20	2000
SN74HC573AQPWRQ1	ACTIVE	-40 to 125	0.27 | 1ku	TSSOP (PW) | 20	2000

SN74HC573A-Q1 质量与无铅数据

器件	环保计划*	铅/焊球涂层	MSL 等级/回流焊峰	环保信息与无铅 (Pb-free)	DPPM / MTBF / FIT 率
SN74HC573AQDWRQ1	Green (RoHS & no Sb/Br)	CU NIPDAU	Level-1-260C-UNLIM	SN74HC573AQDWRQ1	SN74HC573AQDWRQ1
SN74HC573AQPWRG4Q1	Green (RoHS & no Sb/Br)	CU NIPDAU	Level-1-260C-UNLIM	SN74HC573AQPWRG4Q1	SN74HC573AQPWRG4Q1
SN74HC573AQPWRQ1	Green (RoHS & no Sb/Br)	CU NIPDAU	Level-1-260C-UNLIM	SN74HC573AQPWRQ1	SN74HC573AQPWRQ1

SN74HC573A-Q1 应用技术支持与电子电路设计开发资源下载

1. SN74HC573A-Q1 数据资料 dataSheet 下载.PDF
2. TI 德州仪器触发器/锁存器/寄存器产品选型与价格 . xls
3. Shelf-Life Evaluation of Lead-Free Component Finishes (PDF 1305 KB)
4. Understanding and Interpreting Standard-Logic Data Sheets (PDF 857 KB)
5. TI IBIS File Creation, Validation, and Distribution Processes (PDF 380 KB)
6. Implications of Slow or Floating CMOS Inputs (PDF 101 KB)
7. CMOS Power Consumption and CPD Calculation (PDF 89 KB)
8. Designing With Logic (PDF 186 KB)
9. Live Insertion (PDF 150 KB)
10. Input and Output Characteristics of Digital Integrated Circuits (PDF 1708 KB)
11. Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc (PDF 43 KB)
12. HiRel Unitrode Power Management Brochure (PDF 206 KB)
13. LOGIC Pocket Data Book (PDF 6001 KB)
14. HiRel Unitrode Power Management Brochure (PDF 206 KB)
15. Logic Cross-Reference (PDF 2938 KB)