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SN74HC42 4 线路到 10 线路解码器(10 选 1)

These decimal decoders consist of eight inverters and ten 4-input NAND gates. The inverters are connected in pairs to make BCD input data available for decoding by the NAND gates. Full decoding of valid input logic ensures that all inputs remain off for all invalid input conditions.

SN74HC42
Rating Catalog
Technology Family HC
SN74HC42 特性
SN74HC42 芯片订购指南
器件 状态 温度 价格 封装 | 引脚 封装数量 | 封装载体 丝印标记
SN74HC42D ACTIVE -40 to 85 0.21 | 1ku SOIC (D) | 16 40 | TUBE  
SN74HC42DE4 ACTIVE -40 to 85 0.21 | 1ku SOIC (D) | 16 40 | TUBE  
SN74HC42DG4 ACTIVE -40 to 85 0.21 | 1ku SOIC (D) | 16 40 | TUBE  
SN74HC42DR ACTIVE -40 to 85 0.17 | 1ku SOIC (D) | 16 2500 | LARGE T&R  
SN74HC42DRE4 ACTIVE -40 to 85 0.17 | 1ku SOIC (D) | 16 2500 | LARGE T&R  
SN74HC42DRG4 ACTIVE -40 to 85 0.17 | 1ku SOIC (D) | 16 2500 | LARGE T&R  
SN74HC42N ACTIVE -40 to 85 0.18 | 1ku PDIP (N) | 16 25 | TUBE  
SN74HC42NE4 ACTIVE -40 to 85 0.18 | 1ku PDIP (N) | 16 25 | TUBE  
SN74HC42 质量与无铅数据
器件 环保计划* 铅/焊球涂层 MSL 等级/回流焊峰 环保信息与无铅 (Pb-free) DPPM / MTBF / FIT 率
SN74HC42D Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74HC42D SN74HC42D
SN74HC42DE4 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74HC42DE4 SN74HC42DE4
SN74HC42DG4 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74HC42DG4 SN74HC42DG4
SN74HC42DR Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74HC42DR SN74HC42DR
SN74HC42DRE4 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74HC42DRE4 SN74HC42DRE4
SN74HC42DRG4 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74HC42DRG4 SN74HC42DRG4
SN74HC42N Pb-Free (RoHS) CU NIPDAU N/A for Pkg Type SN74HC42N SN74HC42N
SN74HC42NE4 Pb-Free (RoHS) CU NIPDAU N/A for Pkg Type SN74HC42NE4 SN74HC42NE4
SN74HC42 应用技术支持与电子电路设计开发资源下载
  1. SN74HC42 数据资料 dataSheet 下载.PDF
  2. TI 德州仪器MSI 功能产品选型与价格 . xls
  3. Logic Guide 2009 (PDF 4263 KB)
  4. Shelf-Life Evaluation of Lead-Free Component Finishes (PDF 1305 KB)
  5. Understanding and Interpreting Standard-Logic Data Sheets (PDF 857 KB)
  6. TI IBIS File Creation, Validation, and Distribution Processes (PDF 380 KB)
  7. Implications of Slow or Floating CMOS Inputs (PDF 101 KB)
  8. CMOS Power Consumption and CPD Calculation (PDF 89 KB)
  9. Designing With Logic (PDF 186 KB)
  10. Live Insertion (PDF 150 KB)
  11. Input and Output Characteristics of Digital Integrated Circuits (PDF 1708 KB)
  12. Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc (PDF 43 KB)
  13. HiRel Unitrode Power Management Brochure (PDF 206 KB)
  14. LOGIC Pocket Data Book (PDF 6001 KB)
  15. HiRel Unitrode Power Management Brochure (PDF 206 KB)
  16. Logic Cross-Reference (PDF 2938 KB)