SN74HC253-EP 具有三态输出的增强型产品双路 4 线路至 1 线路数据选择器/多路复用器

Each data selector/multiplexer contains inverters and drivers to supply full binary decoding data selection to the AND-OR gates. Separate output-control inputs are provided for each of the two 4-line sections.

The 3-state outputs can interface with and drive data lines of bus-organized systems. With all but one of the common outputs disabled (in the high-impedance state), the low impedance of the single enabled output drives the bus line to a high or low logic level. Each output has its own output-enable (OE)\ input. The outputs are disabled when their respective OE\ is high

	SN74HC253-EP
Rating	HiRel Enhanced Product
Technology Family	HC

SN74HC253-EP 特性

• Controlled Baseline
  • One Assembly/Test Site, One Fabrication Site
• Extended Temperature Performance of –40°C to 125°C
• Enhanced Diminishing Manufacturing Sources (DMS) Support
• Enhanced Product-Change Notification
• Qualification Pedigree
• 3-State Version of ’HC153
• Wide Operating Voltage Range of 2 V to 6 V
• High-Current Inverting Outputs Drive Up To 15 LSTTL Loads
• Low Power Consumption, 80-uA Max ICC
• Typical tpd = 9 ns
• ±6-mA Output Drive at 5 V
• Low Input Current of 1 uA Max
• Permit Multiplexing From n Lines to One Line
• Perform Parallel-to-Serial Conversion

SN74HC253-EP 芯片订购指南

器件	状态	温度	价格	封装 | 引脚	封装数量 | 封装载体	丝印标记
SN74HC253QDREP	ACTIVE	-40 to 125	0.45 | 1ku	SOIC (D) | 16	2500 | LARGE T&R
V62/04699-01XE	ACTIVE	-40 to 125	0.45 | 1ku	SOIC (D) | 16	2500 | LARGE T&R

SN74HC253-EP 质量与无铅数据

器件	环保计划*	铅/焊球涂层	MSL 等级/回流焊峰	环保信息与无铅 (Pb-free)	DPPM / MTBF / FIT 率
SN74HC253QDREP	Green (RoHS & no Sb/Br)	CU NIPDAU	Level-1-260C-UNLIM	SN74HC253QDREP	SN74HC253QDREP
V62/04699-01XE	Green (RoHS & no Sb/Br)	CU NIPDAU	Level-1-260C-UNLIM	V62/04699-01XE	V62/04699-01XE

SN74HC253-EP 应用技术支持与电子电路设计开发资源下载

1. SN74HC253-EP 数据资料 dataSheet 下载.PDF
2. TI 德州仪器MSI 功能产品选型与价格 . xls
3. Logic Guide 2009 (PDF 4263 KB)
4. Shelf-Life Evaluation of Lead-Free Component Finishes (PDF 1305 KB)
5. Understanding and Interpreting Standard-Logic Data Sheets (PDF 857 KB)
6. TI IBIS File Creation, Validation, and Distribution Processes (PDF 380 KB)
7. Implications of Slow or Floating CMOS Inputs (PDF 101 KB)
8. CMOS Power Consumption and CPD Calculation (PDF 89 KB)
9. Designing With Logic (PDF 186 KB)
10. Live Insertion (PDF 150 KB)
11. Input and Output Characteristics of Digital Integrated Circuits (PDF 1708 KB)
12. Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc (PDF 43 KB)
13. HiRel Unitrode Power Management Brochure (PDF 206 KB)
14. LOGIC Pocket Data Book (PDF 6001 KB)
15. HiRel Unitrode Power Management Brochure (PDF 206 KB)
16. Logic Cross-Reference (PDF 2938 KB)