SN74GTL1655 可带电插入 16 位 LVTTL 到 GTL/GTL+ 通用总线收发器
The SN74GTL1655 is a high-drive (100 mA), low-output-impedance (12 
) 16-bit UBTTM transceiver that provides LVTTL-to-GTL/GTL+ and GTL/GTL+-to-LVTTL signal-level translation. This device is partitioned as two 8-bit transceivers and combines D-type flip-flops and D-type latches to allow for transparent, latched, and clocked modes of data transfer similar to the ’16501 function. This device provides an interface between cards operating at LVTTL logic levels and a backplane operating at GTL/GTL+ signal levels. Higher-speed operation is a direct result of the reduced output swing (<1 V), reduced input threshold levels, and OECTM circuitry. The high drive is suitable for driving double-terminated low-impedance backplanes using incident-wave switching.
|
SN74GTL1655 |
| Voltage Nodes(V) |
3.3 |
| A Side |
LVTTL |
| B Side |
GTL |
| Fclock(Max)(MHz) |
160 |
| Bus Drive(ma) |
-24/100 |
| No. of Bits |
16 |
| th(ns) |
0.9 |
| tsu(ns) |
2.8 |
| Static Current |
80 |
| Rating |
Catalog |
| Technology Family |
GTL |
SN74GTL1655 特性
- Member of the Texas Instruments WidebusTM Family
- UBTTM Transceiver Combines D-Type Latches and D-Type Flip-Flops for Operation in Transparent, Latched, or Clocked Modes
- OECTM Circuitry Improves Signal Integrity and Reduces Electromagnetic Interference
- Translates Between GTL/GTL+ Signal Level and LVTTL Logic Levels
- High-Drive (100 mA), Low-Output-Impedance (12 ) Bus Transceiver (B Port)
- Edge-Rate-Control Input Configures the B-Port Output Rise and Fall Times
- Ioff, Power-Up 3-State, and BIAS VCC Support Live Insertion
- Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors on A Port
- Distributed VCC and GND Pins Minimize High-Speed Switching Noise
SN74GTL1655 芯片订购指南
| 器件 |
状态 |
温度 |
价格（美元） |
封装 | 引脚 |
封装数量 | 封装载体 |
丝印标记 |
| SN74GTL1655DGGR |
ACTIVE |
-40 to 85 |
13.42 | 1ku |
TSSOP (DGG) | 64 |
2000 | LARGE T&R |
|
| SN74GTL1655DGGRE4 |
ACTIVE |
-40 to 85 |
13.42 | 1ku |
TSSOP (DGG) | 64 |
2000 | LARGE T&R |
|
| SN74GTL1655DGGRG4 |
ACTIVE |
-40 to 85 |
13.42 | 1ku |
TSSOP (DGG) | 64 |
2000 | LARGE T&R |
|
SN74GTL1655 质量与无铅数据
| 器件 |
环保计划* |
铅/焊球涂层 |
MSL 等级/回流焊峰 |
环保信息与无铅 (Pb-free) |
DPPM / MTBF / FIT 率 |
| SN74GTL1655DGGR |
Green (RoHS & no Sb/Br) |
CU NIPDAU |
Level-1-260C-UNLIM |
SN74GTL1655DGGR |
SN74GTL1655DGGR |
| SN74GTL1655DGGRE4 |
Green (RoHS & no Sb/Br) |
CU NIPDAU |
Level-1-260C-UNLIM |
SN74GTL1655DGGRE4 |
SN74GTL1655DGGRE4 |
| SN74GTL1655DGGRG4 |
Green (RoHS & no Sb/Br) |
CU NIPDAU |
Level-1-260C-UNLIM |
SN74GTL1655DGGRG4 |
SN74GTL1655DGGRG4 |
SN74GTL1655 应用技术支持与电子电路设计开发资源下载
- SN74GTL1655 数据资料 dataSheet 下载.PDF
- TI 德州仪器特殊逻辑产品选型与价格 . xls
- Shelf-Life Evaluation of Lead-Free Component Finishes (PDF 1305 KB)
- Understanding and Interpreting Standard-Logic Data Sheets (PDF 857 KB)
- TI IBIS File Creation, Validation, and Distribution Processes (PDF 380 KB)
- Implications of Slow or Floating CMOS Inputs (PDF 101 KB)
- CMOS Power Consumption and CPD Calculation (PDF 89 KB)
- Designing With Logic (PDF 186 KB)
- Live Insertion (PDF 150 KB)
- Input and Output Characteristics of Digital Integrated Circuits (PDF 1708 KB)
- Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc (PDF 43 KB)
- HiRel Unitrode Power Management Brochure (PDF 206 KB)
- LOGIC Pocket Data Book (PDF 6001 KB)
- HiRel Unitrode Power Management Brochure (PDF 206 KB)
- Logic Cross-Reference (PDF 2938 KB)