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SN74F175 具有清零功能的四路 D 类触发器

This positive-edge-triggered flip-flop utilizes TTL circuitry to implement D-type flip-flop logic with a direct clear (CLR)\ input. Information at the data (D) inputs meeting setup-time requirements is transferred to outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a particular voltage level and is not directly related to the transition time of the positive-going pulse. When the clock (CLK) input is at either the high or low level, the D-input signal has no effect at the output.

SN74F175
Voltage Nodes(V) 5
Rating Catalog
SN74F175 特性
SN74F175 芯片订购指南
器件 状态 温度 价格(美元) 封装 | 引脚 封装数量 | 封装载体 丝印标记
SN74F175DBLE OBSOLETE -40 to 85 SSOP (DB) | 16  
SN74F175DBR ACTIVE -40 to 85 0.40 | 1ku SSOP (DB) | 16 2000 | LARGE T&R  
SN74F175DBRG4 ACTIVE -40 to 85 0.40 | 1ku SSOP (DB) | 16 2000 | LARGE T&R  
SN74F175DW ACTIVE -40 to 85 0.43 | 1ku SOIC (DW) | 16 25 | TUBE  
SN74F175DWE4 ACTIVE -40 to 85 0.43 | 1ku SOIC (DW) | 16 25 | TUBE  
SN74F175DWG4 ACTIVE -40 to 85 0.43 | 1ku SOIC (DW) | 16 25 | TUBE  
SN74F175DWR ACTIVE -40 to 85 0.36 | 1ku SOIC (DW) | 16 2000 | LARGE T&R  
SN74F175DWRE4 ACTIVE -40 to 85 0.36 | 1ku SOIC (DW) | 16 2000 | LARGE T&R  
SN74F175DWRG4 ACTIVE -40 to 85 0.36 | 1ku SOIC (DW) | 16 2000 | LARGE T&R  
SN74F175N ACTIVE -40 to 85 0.40 | 1ku PDIP (N) | 16 20 | TUBE  
SN74F175NE4 ACTIVE -40 to 85 0.40 | 1ku PDIP (N) | 16 20 | TUBE  
SN74F175NSR ACTIVE -40 to 85 0.40 | 1ku SO (NS) | 16 2000 | LARGE T&R  
SN74F175NSRE4 ACTIVE -40 to 85 0.40 | 1ku SO (NS) | 16 2000 | LARGE T&R  
SN74F175NSRG4 ACTIVE -40 to 85 0.40 | 1ku SO (NS) | 16 2000 | LARGE T&R  
SN74F175PW ACTIVE -40 to 85 0.43 | 1ku TSSOP (PW) | 16 70 | TUBE  
SN74F175PWE4 ACTIVE -40 to 85 0.43 | 1ku TSSOP (PW) | 16 70 | TUBE  
SN74F175PWG4 ACTIVE -40 to 85 0.43 | 1ku TSSOP (PW) | 16 70 | TUBE  
SN74F175PWLE OBSOLETE -40 to 85 TSSOP (PW) | 16  
SN74F175PWR ACTIVE -40 to 85 0.36 | 1ku TSSOP (PW) | 16 2000 | LARGE T&R  
SN74F175PWRE4 ACTIVE -40 to 85 0.36 | 1ku TSSOP (PW) | 16 2000 | LARGE T&R  
SN74F175PWRG4 ACTIVE -40 to 85 0.36 | 1ku TSSOP (PW) | 16 2000 | LARGE T&R  
SN74F175 质量与无铅数据
器件 环保计划* 铅/焊球涂层 MSL 等级/回流焊峰 环保信息与无铅 (Pb-free) DPPM / MTBF / FIT 率
SN74F175DBR Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74F175DBR SN74F175DBR
SN74F175DBRG4 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74F175DBRG4 SN74F175DBRG4
SN74F175DW Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74F175DW SN74F175DW
SN74F175DWE4 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74F175DWE4 SN74F175DWE4
SN74F175DWG4 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74F175DWG4 SN74F175DWG4
SN74F175DWR Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74F175DWR SN74F175DWR
SN74F175DWRE4 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74F175DWRE4 SN74F175DWRE4
SN74F175DWRG4 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74F175DWRG4 SN74F175DWRG4
SN74F175N Pb-Free (RoHS) CU NIPDAU N/A for Pkg Type SN74F175N SN74F175N
SN74F175NE4 Pb-Free (RoHS) CU NIPDAU N/A for Pkg Type SN74F175NE4 SN74F175NE4
SN74F175NSR Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74F175NSR SN74F175NSR
SN74F175NSRE4 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74F175NSRE4 SN74F175NSRE4
SN74F175NSRG4 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74F175NSRG4 SN74F175NSRG4
SN74F175PW Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74F175PW SN74F175PW
SN74F175PWE4 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74F175PWE4 SN74F175PWE4
SN74F175PWG4 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74F175PWG4 SN74F175PWG4
SN74F175PWR Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74F175PWR SN74F175PWR
SN74F175PWRE4 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74F175PWRE4 SN74F175PWRE4
SN74F175PWRG4 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74F175PWRG4 SN74F175PWRG4
SN74F175 应用技术支持与电子电路设计开发资源下载
  1. SN74F175 数据资料 dataSheet 下载.PDF
  2. TI 德州仪器触发器/锁存器/寄存器产品选型与价格 . xls
  3. Shelf-Life Evaluation of Lead-Free Component Finishes (PDF 1305 KB)
  4. Understanding and Interpreting Standard-Logic Data Sheets (PDF 857 KB)
  5. TI IBIS File Creation, Validation, and Distribution Processes (PDF 380 KB)
  6. Implications of Slow or Floating CMOS Inputs (PDF 101 KB)
  7. CMOS Power Consumption and CPD Calculation (PDF 89 KB)
  8. Designing With Logic (PDF 186 KB)
  9. Live Insertion (PDF 150 KB)
  10. Input and Output Characteristics of Digital Integrated Circuits (PDF 1708 KB)
  11. Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc (PDF 43 KB)
  12. HiRel Unitrode Power Management Brochure (PDF 206 KB)
  13. LOGIC Pocket Data Book (PDF 6001 KB)
  14. HiRel Unitrode Power Management Brochure (PDF 206 KB)
  15. Logic Cross-Reference (PDF 2938 KB)