SN74CBTLV3384 低电压 10 位 FET 总线开关
The SN74CBTLV3384 provides ten bits of high-speed bus switching. The low on-state resistance of the switch allows connections to be made with minimal propagation delay.
The device is organized as dual 5-bit bus switches with separate output-enable (OE\) inputs. It can be used as two 5-bit bus switches or one 10-bit bus switch. When OE\ is low, the associated 5-bit bus switch is on and A port is connected to B port. When OE\ is high, the switch is open, and the high-impedance state exists between the two ports.
This device is fully specified for partial-power-down applications using Ioff. The Ioff feature ensures that damaging current will not backflow through the device when it is powered down. The device has isolation during power off
| SN74CBTLV3384 | |
| Voltage Nodes(V) | 3.3, 2.5 |
| Vcc range(V) | 2.3 to 3.6 |
| No. of Bits | 10 |
| Input Level | LVTTL |
| ron(max)(ohms) | 7 |
| Static Current | 0.01 |
| tpd max(ns) | 0.25 |
| Rating | Catalog |
| Technology Family | CBTLV |
SN74CBTLV3384 特性
- 5-
Switch Connection Between Two Ports
- Rail-to-Rail Switching on Data I/O Ports
- Ioff Supports Partial-Power-Down Mode Operation
- Latch-Up Performance Exceeds 250 mA Per JESD 17
- ESD Protection Exceeds JESD 22
- 2000-V Human-Body Model (A114-A)
- 200-V Machine Model (A115-A)
SN74CBTLV3384 芯片订购指南
| 器件 | 状态 | 温度 | 价格 | 封装 | 引脚 | 封装数量 | 封装载体 | 丝印标记 |
| SN74CBTLV3384DW | ACTIVE | -40 to 85 | 0.65 | 1ku | SOIC(DW) | 24 | 50 | TUBE | |
| SN74CBTLV3384DWE4 | ACTIVE | -40 to 85 | 0.65 | 1ku | SOIC(DW) | 24 | 50 | TUBE | |
| SN74CBTLV3384DWG4 | ACTIVE | -40 to 85 | 0.65 | 1ku | SOIC(DW) | 24 | 50 | TUBE | |
| SN74CBTLV3384DWR | ACTIVE | -40 to 85 | 0.55 | 1ku | SOIC(DW) | 24 | 2500 | LARGE T&R | |
| SN74CBTLV3384DWRE4 | ACTIVE | -40 to 85 | 0.55 | 1ku | SOIC(DW) | 24 | 2500 | LARGE T&R | |
| SN74CBTLV3384DWRG4 | ACTIVE | -40 to 85 | 0.55 | 1ku | SOIC(DW) | 24 | 2500 | LARGE T&R |
SN74CBTLV3384 质量与无铅数据
| 器件 | 环保计划* | 铅/焊球涂层 | MSL 等级/回流焊峰 | 环保信息与无铅 (Pb-free) | DPPM / MTBF / FIT 率 |
| SN74CBTLV3384DW | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | SN74CBTLV3384DW | SN74CBTLV3384DW |
| SN74CBTLV3384DWE4 | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | SN74CBTLV3384DWE4 | SN74CBTLV3384DWE4 |
| SN74CBTLV3384DWG4 | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | SN74CBTLV3384DWG4 | SN74CBTLV3384DWG4 |
| SN74CBTLV3384DWR | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | SN74CBTLV3384DWR | SN74CBTLV3384DWR |
| SN74CBTLV3384DWRE4 | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | SN74CBTLV3384DWRE4 | SN74CBTLV3384DWRE4 |
| SN74CBTLV3384DWRG4 | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | SN74CBTLV3384DWRG4 | SN74CBTLV3384DWRG4 |
SN74CBTLV3384 应用技术支持与电子电路设计开发资源下载
- SN74CBTLV3384 数据资料 dataSheet 下载.PDF
- TI 德州仪器信号开关产品选型与价格 . xls
- Logic Guide 2009 (PDF 4263 KB)
- 防止模拟开关的额外功耗 (PDF 392 KB) (PDF 1305 KB)
- Understanding and Interpreting Standard-Logic Data Sheets (PDF 857 KB)
- TI IBIS File Creation, Validation, and Distribution Processes (PDF 380 KB)
- Implications of Slow or Floating CMOS Inputs (PDF 101 KB)
- CMOS Power Consumption and CPD Calculation (PDF 89 KB)
- Designing With Logic (PDF 186 KB)
- Live Insertion (PDF 150 KB)
- Input and Output Characteristics of Digital Integrated Circuits (PDF 1708 KB)
- Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc (PDF 43 KB)
- HiRel Unitrode Power Management Brochure (PDF 206 KB)
- LOGIC Pocket Data Book (PDF 6001 KB)
- HiRel Unitrode Power Management Brochure (PDF 206 KB)
- Logic Cross-Reference (PDF 2938 KB)