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SN74CBT3345 8 位 FET 总线开关

The SN74CBT3345 provides eight bits of high-speed TTL-compatible bus switching in a standard ’245 device pinout. The low on-state resistance of the switch allows connections to be made with minimal propagation delay.

The device is organized as one 8-bit switch bank with dual output-enable (OE and OE)\ inputs. When OE\ is low or OE is high, the switch is on, and port A is connected to port B. When OE\ is high and OE is low, the switch is open, and the high-impedance state exists between the two ports

SN74CBT3345
Voltage Nodes(V) 5
Vcc range(V) 4.0 to 5.5
No. of Bits 8
Input Level TTL
ron(max)(ohms) 7
Static Current 0.05
tpd max(ns) 0.25
Rating Catalog
Technology Family CBT
SN74CBT3345 特性
SN74CBT3345 芯片订购指南
器件 状态 温度 价格 封装 | 引脚 封装数量 | 封装载体 丝印标记
SN74CBT3345DW ACTIVE -40 to 85 0.37 | 1ku SOIC (DW) | 20 50 | TUBE  
SN74CBT3345DWE4 ACTIVE -40 to 85 0.37 | 1ku SOIC (DW) | 20 50 | TUBE  
SN74CBT3345DWG4 ACTIVE -40 to 85 0.37 | 1ku SOIC (DW) | 20 50 | TUBE  
SN74CBT3345DWR ACTIVE -40 to 85 0.31 | 1ku SOIC (DW) | 20 2500 | LARGE T&R  
SN74CBT3345DWRE4 ACTIVE -40 to 85 0.31 | 1ku SOIC (DW) | 20 2500 | LARGE T&R  
SN74CBT3345DWRG4 ACTIVE -40 to 85 0.31 | 1ku SOIC (DW) | 20 2500 | LARGE T&R  
SN74CBT3345 质量与无铅数据
器件 环保计划* 铅/焊球涂层 MSL 等级/回流焊峰 环保信息与无铅 (Pb-free) DPPM / MTBF / FIT 率
SN74CBT3345DW Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74CBT3345DW SN74CBT3345DW
SN74CBT3345DWE4 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74CBT3345DWE4 SN74CBT3345DWE4
SN74CBT3345DWG4 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74CBT3345DWG4 SN74CBT3345DWG4
SN74CBT3345DWR Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74CBT3345DWR SN74CBT3345DWR
SN74CBT3345DWRE4 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74CBT3345DWRE4 SN74CBT3345DWRE4
SN74CBT3345DWRG4 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74CBT3345DWRG4 SN74CBT3345DWRG4
SN74CBT3345 应用技术支持与电子电路设计开发资源下载
  1. SN74CBT3345 数据资料 dataSheet 下载.PDF
  2. TI 德州仪器信号开关产品选型与价格 . xls
  3. Logic Guide 2009 (PDF 4263 KB)
  4. 防止模拟开关的额外功耗 (PDF 392 KB) (PDF 1305 KB)
  5. Understanding and Interpreting Standard-Logic Data Sheets (PDF 857 KB)
  6. TI IBIS File Creation, Validation, and Distribution Processes (PDF 380 KB)
  7. Implications of Slow or Floating CMOS Inputs (PDF 101 KB)
  8. CMOS Power Consumption and CPD Calculation (PDF 89 KB)
  9. Designing With Logic (PDF 186 KB)
  10. Live Insertion (PDF 150 KB)
  11. Input and Output Characteristics of Digital Integrated Circuits (PDF 1708 KB)
  12. Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc (PDF 43 KB)
  13. HiRel Unitrode Power Management Brochure (PDF 206 KB)
  14. LOGIC Pocket Data Book (PDF 6001 KB)
  15. HiRel Unitrode Power Management Brochure (PDF 206 KB)
  16. Logic Cross-Reference (PDF 2938 KB)