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SN74CBT3125 四路 FET 总线开关

The SN74CBT3125 quadruple FET bus switch features independent line switches. Each switch is disabled when the associated output-enable (OE)\ input is high.

To ensure the high-impedance state during power up or power down, OE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver

SN74CBT3125
Voltage Nodes(V) 5
Vcc range(V) 4.0 to 5.5
No. of Bits 4
Input Level TTL
ron(max)(ohms) 7
Static Current 0.003
tpd max(ns) 0.25
Rating Catalog
Technology Family CBT
SN74CBT3125 特性
SN74CBT3125 芯片订购指南
器件 状态 温度 价格 封装 | 引脚 封装数量 | 封装载体 丝印标记
SN74CBT3125D ACTIVE -40 to 85 0.37 | 1ku SOIC (D) | 14 50 | TUBE  
SN74CBT3125DE4 ACTIVE -40 to 85 0.37 | 1ku SOIC (D) | 14 50 | TUBE  
SN74CBT3125DG4 ACTIVE -40 to 85 0.37 | 1ku SOIC (D) | 14 50 | TUBE  
SN74CBT3125DR ACTIVE -40 to 85 0.31 | 1ku SOIC (D) | 14 2500 | LARGE T&R  
SN74CBT3125DRE4 ACTIVE -40 to 85 0.31 | 1ku SOIC (D) | 14 2500 | LARGE T&R  
SN74CBT3125DRG4 ACTIVE -40 to 85 0.31 | 1ku SOIC (D) | 14 2500 | LARGE T&R  
SN74CBT3125 质量与无铅数据
器件 环保计划* 铅/焊球涂层 MSL 等级/回流焊峰 环保信息与无铅 (Pb-free) DPPM / MTBF / FIT 率
SN74CBT3125D Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74CBT3125D SN74CBT3125D
SN74CBT3125DE4 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74CBT3125DE4 SN74CBT3125DE4
SN74CBT3125DG4 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74CBT3125DG4 SN74CBT3125DG4
SN74CBT3125DR Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74CBT3125DR SN74CBT3125DR
SN74CBT3125DRE4 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74CBT3125DRE4 SN74CBT3125DRE4
SN74CBT3125DRG4 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74CBT3125DRG4 SN74CBT3125DRG4
SN74CBT3125 应用技术支持与电子电路设计开发资源下载
  1. SN74CBT3125 数据资料 dataSheet 下载.PDF
  2. TI 德州仪器信号开关产品选型与价格 . xls
  3. Logic Guide 2009 (PDF 4263 KB)
  4. 防止模拟开关的额外功耗 (PDF 392 KB) (PDF 1305 KB)
  5. Understanding and Interpreting Standard-Logic Data Sheets (PDF 857 KB)
  6. TI IBIS File Creation, Validation, and Distribution Processes (PDF 380 KB)
  7. Implications of Slow or Floating CMOS Inputs (PDF 101 KB)
  8. CMOS Power Consumption and CPD Calculation (PDF 89 KB)
  9. Designing With Logic (PDF 186 KB)
  10. Live Insertion (PDF 150 KB)
  11. Input and Output Characteristics of Digital Integrated Circuits (PDF 1708 KB)
  12. Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc (PDF 43 KB)
  13. HiRel Unitrode Power Management Brochure (PDF 206 KB)
  14. LOGIC Pocket Data Book (PDF 6001 KB)
  15. HiRel Unitrode Power Management Brochure (PDF 206 KB)
  16. Logic Cross-Reference (PDF 2938 KB)