SN74CBT16800 具有预充电输出的 20 位 FET 总线开关
The SN74CBT16800 provides 20 bits of high-speed TTL-compatible bus switching. The low on-state resistance of the switch allows connections to be made with minimal propagation delay. The device also precharges the B port to a user-selectable bias voltage (BIASV) to minimize live-insertion noise.
The device is organized as dual 10-bit bus switches with separate output-enable (OE\) inputs. It can be used as two 10-bit bus switches or one 20-bit bus switch. When OE\ is low, the associated 10-bit bus switch is on and port A is connected to port B. When OE\ is high, the switch is open, the high-impedance state exists between the two ports, and port B is precharged to BIASV through the equivalent of a 10-k 
resistor
| SN74CBT16800 | |
| Voltage Nodes(V) | 5 |
| Vcc range(V) | 4.0 to 5.5 |
| No. of Bits | 20 |
| Input Level | TTL |
| Static Current | 0.05 |
| Rating | Catalog |
| Technology Family | CBT |
SN74CBT16800 特性
- 5- Switch Connection Between Two Ports
- TTL-Compatible Input Levels
- B-Port Outputs Are Precharged by Bias Voltage to Minimize Signal Distortion During Live Insertion
- Package Options Include Plastic Thin Shrink Small-Outline (DGG) and Thin Very Small-Outline (DGV) Packages
SN74CBT16800 应用技术支持与电子电路设计开发资源下载
- SN74CBT16800 数据资料 dataSheet 下载.PDF
- TI 德州仪器信号开关产品选型与价格 . xls
- Logic Guide 2009 (PDF 4263 KB)
- 防止模拟开关的额外功耗 (PDF 392 KB) (PDF 1305 KB)
- Understanding and Interpreting Standard-Logic Data Sheets (PDF 857 KB)
- TI IBIS File Creation, Validation, and Distribution Processes (PDF 380 KB)
- Implications of Slow or Floating CMOS Inputs (PDF 101 KB)
- CMOS Power Consumption and CPD Calculation (PDF 89 KB)
- Designing With Logic (PDF 186 KB)
- Live Insertion (PDF 150 KB)
- Input and Output Characteristics of Digital Integrated Circuits (PDF 1708 KB)
- Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc (PDF 43 KB)
- HiRel Unitrode Power Management Brochure (PDF 206 KB)
- LOGIC Pocket Data Book (PDF 6001 KB)
- HiRel Unitrode Power Management Brochure (PDF 206 KB)
- Logic Cross-Reference (PDF 2938 KB)