SN74CB3Q6800 具有预充电输出 2.5V/3.3V 低电压和高带宽的 FET 总线开关
The SN74CB3Q6800 is a high-bandwidth FET bus switch utilizing a charge pump to elevate the gate voltage of the pass transistor, providing a low and flat ON-state resistance (ron). The low and flat ON-state resistance allows for minimal propagation delay and supports rail-to-rail switching on the data input/output (I/O) ports. The device also features low data I/O capacitance to minimize capacitive loading and signal distortion on the data bus. Specifically designed to support high-bandwidth applications, the SN74CB3Q6800 provides an optimized interface solution ideally suited for broadband communications, networking, and data-intensive computing systems.
The SN74CB3Q6800 is a 10-bit bus switch with a single output-enable (ON\) input
|
SN74CB3Q6800 |
| Voltage Nodes(V) |
2.5, 3.3 |
| Vcc range(V) |
2.3 to 3.6 |
| No. of Bits |
10 |
| Input Level |
9 |
| ron(max)(ohms) |
0.75 mA |
| Static Current(Max) |
2 mA |
| tpd max(ns) |
0.225 |
| Rating |
Catalog |
| Technology Family |
CB3Q |
SN74CB3Q6800 特性
- High-Bandwidth Data Path (Up To 500 MHz
)
- 5-V Tolerant I/Os with Device Powered-Up or Powered-Down
- Low and Flat ON-State Resistance (ron) Characteristics Over Operating Range (ron = 4.5
Typical)
- Rail-to-Rail Switching on Data I/O Ports
- 0- to 5-V Switching With 3.3-V VCC
- 0- to 3.3-V Switching With 2.5-V VCC
- B-Port Outputs Are Precharged by Bias Voltage (BIASV) to Minimize Signal Distortion During Live Insertion and Hot-Plugging
- Supports PCI Hot Plug
- Bidirectional Data Flow, With Near-Zero Propagation Delay
- Low Input/Output Capacitance Minimizes Loading and Signal Distortion (Cio(OFF) = 3.5 pF Typical)
- Fast Switching Frequency (fON\= 20 MHz Max)
- Data and Control Inputs Provide Undershoot Clamp Diodes
- Low Power Consumption (ICC = 0.75 mA Typical)
- VCC Operating Range From 2.3 V to 3.6 V
- Data I/Os Support 0 to 5-V Signaling Levels (0.8-V, 1.2-V, 1.5-V, 1.8-V, 2.5-V, 3.3-V, 5-V)
- Control Inputs Can be Driven by TTL or 5-V/3.3-V CMOS Outputs
- Ioff Supports Partial-Power-Down Mode Operation
- Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
- ESD Performance Tested Per JESD 22
- 2000-V Human-Body Model (A114-B, Class II)
SN74CB3Q6800 芯片订购指南
SN74CB3Q6800 质量与无铅数据
| 器件 |
环保计划* |
铅/焊球涂层 |
MSL 等级/回流焊峰 |
环保信息与无铅 (Pb-free) |
DPPM / MTBF / FIT 率 |
| 74CB3Q6800DBQRE4 |
Green (RoHS & no Sb/Br) |
CU NIPDAU |
Level-2-260C-1 YEAR |
74CB3Q6800DBQRE4 |
74CB3Q6800DBQRE4 |
| 74CB3Q6800DBQRG4 |
Green (RoHS & no Sb/Br) |
CU NIPDAU |
Level-2-260C-1 YEAR |
74CB3Q6800DBQRG4 |
74CB3Q6800DBQRG4 |
| 74CB3Q6800DGVRE4 |
Green (RoHS & no Sb/Br) |
CU NIPDAU |
Level-1-260C-UNLIM |
74CB3Q6800DGVRE4 |
74CB3Q6800DGVRE4 |
| 74CB3Q6800DGVRG4 |
Green (RoHS & no Sb/Br) |
CU NIPDAU |
Level-1-260C-UNLIM |
74CB3Q6800DGVRG4 |
74CB3Q6800DGVRG4 |
| SN74CB3Q6800DBQR |
Green (RoHS & no Sb/Br) |
CU NIPDAU |
Level-2-260C-1 YEAR |
SN74CB3Q6800DBQR |
SN74CB3Q6800DBQR |
| SN74CB3Q6800DGVR |
Green (RoHS & no Sb/Br) |
CU NIPDAU |
Level-1-260C-UNLIM |
SN74CB3Q6800DGVR |
SN74CB3Q6800DGVR |
| SN74CB3Q6800PW |
Green (RoHS & no Sb/Br) |
CU NIPDAU |
Level-1-260C-UNLIM |
SN74CB3Q6800PW |
SN74CB3Q6800PW |
| SN74CB3Q6800PWE4 |
Green (RoHS & no Sb/Br) |
CU NIPDAU |
Level-1-260C-UNLIM |
SN74CB3Q6800PWE4 |
SN74CB3Q6800PWE4 |
| SN74CB3Q6800PWG4 |
Green (RoHS & no Sb/Br) |
CU NIPDAU |
Level-1-260C-UNLIM |
SN74CB3Q6800PWG4 |
SN74CB3Q6800PWG4 |
| SN74CB3Q6800PWR |
Green (RoHS & no Sb/Br) |
CU NIPDAU |
Level-1-260C-UNLIM |
SN74CB3Q6800PWR |
SN74CB3Q6800PWR |
| SN74CB3Q6800PWRE4 |
Green (RoHS & no Sb/Br) |
CU NIPDAU |
Level-1-260C-UNLIM |
SN74CB3Q6800PWRE4 |
SN74CB3Q6800PWRE4 |
| SN74CB3Q6800PWRG4 |
Green (RoHS & no Sb/Br) |
CU NIPDAU |
Level-1-260C-UNLIM |
SN74CB3Q6800PWRG4 |
SN74CB3Q6800PWRG4 |
SN74CB3Q6800 应用技术支持与电子电路设计开发资源下载
- SN74CB3Q6800 数据资料 dataSheet 下载.PDF
- TI 德州仪器信号开关产品选型与价格 . xls
- Logic Guide 2009 (PDF 4263 KB)
- 防止模拟开关的额外功耗 (PDF 392 KB) (PDF 1305 KB)
- Understanding and Interpreting Standard-Logic Data Sheets (PDF 857 KB)
- TI IBIS File Creation, Validation, and Distribution Processes (PDF 380 KB)
- Implications of Slow or Floating CMOS Inputs (PDF 101 KB)
- CMOS Power Consumption and CPD Calculation (PDF 89 KB)
- Designing With Logic (PDF 186 KB)
- Live Insertion (PDF 150 KB)
- Input and Output Characteristics of Digital Integrated Circuits (PDF 1708 KB)
- Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc (PDF 43 KB)
- HiRel Unitrode Power Management Brochure (PDF 206 KB)
- LOGIC Pocket Data Book (PDF 6001 KB)
- HiRel Unitrode Power Management Brochure (PDF 206 KB)
- Logic Cross-Reference (PDF 2938 KB)