These 8-bit bus-interface flip-flops feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing wider buffer registers, I/O ports, bidirectional bus drivers with parity, and working registers.
The eight flip-flops are edge-triggered D-type flip-flops. With the clock-enable () input low, the device enters data on the low-to-high transition of the clock. Taking high disables the clock buffer, thus latching the outputs. Taking the clear () input low causes the eight Q outputs to go low independently of the clock.
Buffered output-enable (,, or) inputs can be used to place the eight outputs in either a normal logic state (high or low) or a high-impedance state
SN74BCT29825 | |
Voltage Nodes(V) | 5 |
Vcc range(V) | 4.5 to 5.5 |
Input Level | TTL |
Output Level | TTL |
Output Drive(mA) | -24/48 |
No. of Outputs | 8 |
Static Current | 28 |
th(ns) | 1.5 |
tpd max(ns) | 9 |
tsu(ns) | 6 |
Logic | True |
Technology Family | BCT |
Rating | Catalog |
器件 | 状态 | 温度 | 价格(美元) | 封装 | 引脚 | 封装数量 | 封装载体 | 丝印标记 |
SN74BCT29825NT | ACTIVE | 0 to 70 | 8.00 | 1ku | PDIP (NT) | 24 | 15 | TUBE | SN74BCT29825NT |
SN74BCT29825NTE4 | ACTIVE | 0 to 70 | 8.00 | 1ku | PDIP (NT) | 24 | 15 | TUBE | SN74BCT29825NT |
器件 | 环保计划* | 铅/焊球涂层 | MSL 等级/回流焊峰 | 环保信息与无铅 (Pb-free) | DPPM / MTBF / FIT 率 |
SN74BCT29825NT | Pb-Free (RoHS) | CU NIPDAU | N/A for Pkg Type | SN74BCT29825NT | SN74BCT29825NT |
SN74BCT29825NTE4 | Pb-Free (RoHS) | CU NIPDAU | N/A for Pkg Type | SN74BCT29825NTE4 | SN74BCT29825NTE4 |