SN74AVCH4T245-EP 具有可配置电压转换和 3 态输出的 4 位双电源总线收发器

	SN74AVCH4T245-EP
Voltage Nodes(V)	3.3, 2.5, 1.8, 1.5, 1.2
Vcc range(V)	1.2 to 3.6
Logic	True
No. of Bits	4
Bus Drive(ma)	-12/12
Static Current	0.016
tpd max(ns)	2.9
Technology Family	AVC
Pin/Package	16SOIC
Operating Temperature Range(°C)	-40 to 85
Approx. Price (US$)	0.70 | 1ku
Rating	HiRel Enhanced Product

SN74AVCH4T245-EP 芯片订购指南

器件	状态	温度	价格（美元）	封装 | 引脚	封装数量 | 封装载体	丝印标记
CAVCH4T245MRSVREP	ACTIVE	-55 to 125	2.97 | 100u	UQFN (RSV) | 16	3000 | LARGE T&R
V62/09618-01XE	ACTIVE	-55 to 125	2.97 | 100u	UQFN (RSV) | 16	3000 | LARGE T&R

SN74AVCH4T245-EP 质量与无铅数据

器件	环保计划*	铅/焊球涂层	MSL 等级/回流焊峰	环保信息与无铅 (Pb-free)	DPPM / MTBF / FIT 率
CAVCH4T245MRSVREP	TBD	Call TI	Call TI	CAVCH4T245MRSVREP	CAVCH4T245MRSVREP
V62/09618-01XE	TBD	Call TI	Call TI	V62/09618-01XE	V62/09618-01XE

SN74AVCH4T245-EP 应用技术支持与电子电路设计开发资源下载

1. SN74AVCH4T245-EP 数据资料 dataSheet 下载.PDF
2. TI 德州仪器电压电平转换产品选型与价格 . xls
3. Shelf-Life Evaluation of Lead-Free Component Finishes (PDF 1305 KB)
4. Understanding and Interpreting Standard-Logic Data Sheets (PDF 857 KB)
5. TI IBIS File Creation, Validation, and Distribution Processes (PDF 380 KB)
6. Implications of Slow or Floating CMOS Inputs (PDF 101 KB)
7. CMOS Power Consumption and CPD Calculation (PDF 89 KB)
8. Designing With Logic (PDF 186 KB)
9. Live Insertion (PDF 150 KB)
10. Input and Output Characteristics of Digital Integrated Circuits (PDF 1708 KB)
11. Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc (PDF 43 KB)
12. HiRel Unitrode Power Management Brochure (PDF 206 KB)
13. LOGIC Pocket Data Book (PDF 6001 KB)
14. HiRel Unitrode Power Management Brochure (PDF 206 KB)
15. Logic Cross-Reference (PDF 2938 KB)