SN74AUC2G53 单极、双闸 (SPDT) 模拟开关或 2:1 模拟多路复用器/多路解复用器
This analog switch is operational at 0.8-V to 2.7-V VCC, but is designed specifically for 1.1-V to 2.7-V VCC operation.
The SN74AUC2G53 can handle both analog and digital signals. The device permits signals with amplitudes of up to VCC (peak) to be transmitted in either direction.
NanoFreeTM package technology is a major breakthrough in IC packaging concepts, using the die as the package.
Applications include signal gating, chopping, modulation or demodulation (modem), and signal multiplexing for analog-to-digital and digital-to-analog conversion systems
| SN74AUC2G53 | |
| Number of Channels | 2 |
| Configuration | 1 X SPDT |
| ron(max)(ohms) | 15 |
| ICC(uA) | 10 |
| tpd max(ns) | 0.1 |
| Technology Family | AUC |
| Vcc min(V) | 0.8 |
| Vcc max(V) | 2.7 |
| IL OFF(Max)(nA) | +/-1000 |
| RON Mis-match(Max)(Ohms) | 1 |
| ON Time(Max)(ns) | 2.2 |
| OFF Time(Max)(ns) | 2.3 |
| Rating | Catalog |
| Pin/Package | 8DSBGA, 8SM8, 8US8 |
| Approx. Price (US$) | 0.26 | 1ku |
| Operating Temperature Range(°C) | -40 to 85 |
SN74AUC2G53 特性
- Available in the Texas Instruments NanoFreeTM Package
- Operates at 0.8 V to 2.7 V
- Sub-1-V Operable
- Low Power Consumption, 10 uA at 2.7 V
- High On-Off Output Voltage Ratio
- High Degree of Linearity
- Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
- ESD Protection Exceeds JESD 22
- 2000-V Human-Body Model (A114-A)
- 200-V Machine Model (A115-A)
- 1000-V Charged-Device Model (C101)
SN74AUC2G53 芯片订购指南
| 器件 | 状态 | 温度 | 价格 | 封装 | 引脚 | 封装数量 | 封装载体 | 丝印标记 |
| SN74AUC2G53DCTR | ACTIVE | -40 to 85 | 0.26 | 1ku | SM8 (DCT) | 8 | 3000 | LARGE T&R | |
| SN74AUC2G53DCTRE4 | ACTIVE | -40 to 85 | 0.26 | 1ku | SM8 (DCT) | 8 | 3000 | LARGE T&R | |
| SN74AUC2G53DCTRG4 | ACTIVE | -40 to 85 | 0.26 | 1ku | SM8 (DCT) | 8 | 3000 | LARGE T&R | |
| SN74AUC2G53DCUR | ACTIVE | -40 to 85 | 0.29 | 1ku | US8 (DCU) | 8 | 3000 | LARGE T&R | |
| SN74AUC2G53DCURE4 | ACTIVE | -40 to 85 | 0.29 | 1ku | US8 (DCU) | 8 | 3000 | LARGE T&R | |
| SN74AUC2G53DCURG4 | ACTIVE | -40 to 85 | 0.29 | 1ku | US8 (DCU) | 8 | 3000 | LARGE T&R | |
| SN74AUC2G53YZPR | ACTIVE | -40 to 85 | 0.40 | 1ku | DSBGA (YZP) | 8 | 3000 | LARGE T&R |
SN74AUC2G53 质量与无铅数据
| 器件 | 环保计划* | 铅/焊球涂层 | MSL 等级/回流焊峰 | 环保信息与无铅 (Pb-free) | DPPM / MTBF / FIT 率 |
| SN74AUC2G53DCTR | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | SN74AUC2G53DCTR | SN74AUC2G53DCTR |
| SN74AUC2G53DCTRE4 | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | SN74AUC2G53DCTRE4 | SN74AUC2G53DCTRE4 |
| SN74AUC2G53DCTRG4 | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | SN74AUC2G53DCTRG4 | SN74AUC2G53DCTRG4 |
| SN74AUC2G53DCUR | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | SN74AUC2G53DCUR | SN74AUC2G53DCUR |
| SN74AUC2G53DCURE4 | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | SN74AUC2G53DCURE4 | SN74AUC2G53DCURE4 |
| SN74AUC2G53DCURG4 | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | SN74AUC2G53DCURG4 | SN74AUC2G53DCURG4 |
| SN74AUC2G53YZPR | Green (RoHS & no Sb/Br) | SNAGCU | Level-1-260C-UNLIM | SN74AUC2G53YZPR | SN74AUC2G53YZPR |
SN74AUC2G53 应用技术支持与电子电路设计开发资源下载
- SN74AUC2G53 数据资料 dataSheet 下载.PDF
- TI 德州仪器MSI 功能产品选型与价格 . xls
- Logic Guide 2009 (PDF 4263 KB)
- Shelf-Life Evaluation of Lead-Free Component Finishes (PDF 1305 KB)
- Understanding and Interpreting Standard-Logic Data Sheets (PDF 857 KB)
- TI IBIS File Creation, Validation, and Distribution Processes (PDF 380 KB)
- Implications of Slow or Floating CMOS Inputs (PDF 101 KB)
- CMOS Power Consumption and CPD Calculation (PDF 89 KB)
- Designing With Logic (PDF 186 KB)
- Live Insertion (PDF 150 KB)
- Input and Output Characteristics of Digital Integrated Circuits (PDF 1708 KB)
- Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc (PDF 43 KB)
- HiRel Unitrode Power Management Brochure (PDF 206 KB)
- LOGIC Pocket Data Book (PDF 6001 KB)
- HiRel Unitrode Power Management Brochure (PDF 206 KB)
- Logic Cross-Reference (PDF 2938 KB)