首页 > TI 德州仪器 > 逻辑 > 触发器/锁存器/寄存器

SN74AS4374B 具有三态输出的八路边沿 D 类双组触发器

This 8-bit flip-flop features 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. It is particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.

The eight flip-flops of the SN74AS4374B are edge-triggered D-type flip-flops. On the second positive transition of the clock (CLK) input, the Q outputs are set to the logic levels set up at the data (D) inputs.

The output-enable () input does not affect internal operations of the flip-flops. Previously stored data can be retained or new data can be entered while the outputs are in the high-impedance state.

The SN74AS4374B is characterized for operation from 0°C to 70°C

SN74AS4374B
Voltage Nodes(V) 5
Vcc range(V) 4.5 to 5.5
Input Level TTL
Output Level TTL
Output Drive(mA) -15/48
No. of Outputs 8
Static Current 150
th(ns) 1
tpd max(ns) 8
tsu(ns) 4
Logic True
Technology Family AS
Rating Catalog
SN74AS4374B 特性
SN74AS4374B 芯片订购指南
器件 状态 温度 价格(美元) 封装 | 引脚 封装数量 | 封装载体 丝印标记
SN74AS4374BDWR ACTIVE 0 to 70 1.10 | 1ku SOIC (DW) | 20 25 | TUBE AS374
SN74AS4374BDWRE4 ACTIVE 0 to 70 1.10 | 1ku SOIC (DW) | 20 25 | TUBE AS374
SN74AS4374BDWRG4 ACTIVE 0 to 70 0.90 | 1ku SOIC (DW) | 20 2000 | LARGE T&R AS374
SN74AS4374B 质量与无铅数据
器件 环保计划* 铅/焊球涂层 MSL 等级/回流焊峰 环保信息与无铅 (Pb-free) DPPM / MTBF / FIT 率
SN74AS4374BDWR Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74AS4374BDW SN74AS4374BDWR
SN74AS4374BDWRE4 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74AS4374BDWE4 SN74AS4374BDWRE4
SN74AS4374BDWRG4 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74AS4374BDWRG4 SN74AS4374BDWRG4
SN74AS4374B 应用技术支持与电子电路设计开发资源下载
  1. SN74AS4374B 数据资料 dataSheet 下载.PDF
  2. TI 德州仪器触发器/锁存器/寄存器产品选型与价格 . xls
  3. Shelf-Life Evaluation of Lead-Free Component Finishes (PDF 1305 KB)
  4. Understanding and Interpreting Standard-Logic Data Sheets (PDF 857 KB)
  5. TI IBIS File Creation, Validation, and Distribution Processes (PDF 380 KB)
  6. Implications of Slow or Floating CMOS Inputs (PDF 101 KB)
  7. CMOS Power Consumption and CPD Calculation (PDF 89 KB)
  8. Designing With Logic (PDF 186 KB)
  9. Live Insertion (PDF 150 KB)
  10. Input and Output Characteristics of Digital Integrated Circuits (PDF 1708 KB)
  11. Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc (PDF 43 KB)
  12. HiRel Unitrode Power Management Brochure (PDF 206 KB)
  13. LOGIC Pocket Data Book (PDF 6001 KB)
  14. HiRel Unitrode Power Management Brochure (PDF 206 KB)
  15. Logic Cross-Reference (PDF 2938 KB)